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@@ -2130,7 +2130,7 @@ static void intel_enable_pipe(struct intel_crtc *crtc)
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* need the check.
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* need the check.
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*/
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*/
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if (HAS_GMCH_DISPLAY(dev_priv->dev))
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if (HAS_GMCH_DISPLAY(dev_priv->dev))
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- if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI))
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+ if (crtc->config->has_dsi_encoder)
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assert_dsi_pll_enabled(dev_priv);
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assert_dsi_pll_enabled(dev_priv);
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else
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else
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assert_pll_enabled(dev_priv, pipe);
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assert_pll_enabled(dev_priv, pipe);
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@@ -4636,7 +4636,7 @@ static void intel_crtc_load_lut(struct drm_crtc *crtc)
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return;
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return;
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if (HAS_GMCH_DISPLAY(dev_priv->dev)) {
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if (HAS_GMCH_DISPLAY(dev_priv->dev)) {
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- if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI))
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+ if (intel_crtc->config->has_dsi_encoder)
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assert_dsi_pll_enabled(dev_priv);
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assert_dsi_pll_enabled(dev_priv);
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else
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else
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assert_pll_enabled(dev_priv, pipe);
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assert_pll_enabled(dev_priv, pipe);
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@@ -4946,7 +4946,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
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int pipe = intel_crtc->pipe, hsw_workaround_pipe;
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int pipe = intel_crtc->pipe, hsw_workaround_pipe;
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struct intel_crtc_state *pipe_config =
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struct intel_crtc_state *pipe_config =
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to_intel_crtc_state(crtc->state);
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to_intel_crtc_state(crtc->state);
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- bool is_dsi = intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI);
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if (WARN_ON(intel_crtc->active))
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if (WARN_ON(intel_crtc->active))
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return;
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return;
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@@ -4988,7 +4987,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
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if (intel_crtc->config->has_pch_encoder)
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if (intel_crtc->config->has_pch_encoder)
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dev_priv->display.fdi_link_train(crtc);
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dev_priv->display.fdi_link_train(crtc);
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- if (!is_dsi)
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+ if (!intel_crtc->config->has_dsi_encoder)
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intel_ddi_enable_pipe_clock(intel_crtc);
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intel_ddi_enable_pipe_clock(intel_crtc);
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if (INTEL_INFO(dev)->gen >= 9)
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if (INTEL_INFO(dev)->gen >= 9)
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@@ -5003,7 +5002,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
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intel_crtc_load_lut(crtc);
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intel_crtc_load_lut(crtc);
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intel_ddi_set_pipe_settings(crtc);
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intel_ddi_set_pipe_settings(crtc);
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- if (!is_dsi)
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+ if (!intel_crtc->config->has_dsi_encoder)
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intel_ddi_enable_transcoder_func(crtc);
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intel_ddi_enable_transcoder_func(crtc);
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intel_update_watermarks(crtc);
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intel_update_watermarks(crtc);
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@@ -5012,7 +5011,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
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if (intel_crtc->config->has_pch_encoder)
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if (intel_crtc->config->has_pch_encoder)
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lpt_pch_enable(crtc);
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lpt_pch_enable(crtc);
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- if (intel_crtc->config->dp_encoder_is_mst && !is_dsi)
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+ if (intel_crtc->config->dp_encoder_is_mst)
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intel_ddi_set_vc_payload_alloc(crtc, true);
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intel_ddi_set_vc_payload_alloc(crtc, true);
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assert_vblank_disabled(crtc);
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assert_vblank_disabled(crtc);
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@@ -5123,7 +5122,6 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_encoder *encoder;
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struct intel_encoder *encoder;
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enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
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enum transcoder cpu_transcoder = intel_crtc->config->cpu_transcoder;
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- bool is_dsi = intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI);
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if (intel_crtc->config->has_pch_encoder)
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if (intel_crtc->config->has_pch_encoder)
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intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
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intel_set_pch_fifo_underrun_reporting(dev_priv, TRANSCODER_A,
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@@ -5142,7 +5140,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
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if (intel_crtc->config->dp_encoder_is_mst)
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if (intel_crtc->config->dp_encoder_is_mst)
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intel_ddi_set_vc_payload_alloc(crtc, false);
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intel_ddi_set_vc_payload_alloc(crtc, false);
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- if (!is_dsi)
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+ if (!intel_crtc->config->has_dsi_encoder)
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intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
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intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
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if (INTEL_INFO(dev)->gen >= 9)
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if (INTEL_INFO(dev)->gen >= 9)
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@@ -5150,7 +5148,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc)
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else
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else
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ironlake_pfit_disable(intel_crtc, false);
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ironlake_pfit_disable(intel_crtc, false);
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- if (!is_dsi)
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+ if (!intel_crtc->config->has_dsi_encoder)
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intel_ddi_disable_pipe_clock(intel_crtc);
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intel_ddi_disable_pipe_clock(intel_crtc);
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if (intel_crtc->config->has_pch_encoder) {
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if (intel_crtc->config->has_pch_encoder) {
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@@ -6152,13 +6150,10 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_encoder *encoder;
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struct intel_encoder *encoder;
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int pipe = intel_crtc->pipe;
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int pipe = intel_crtc->pipe;
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- bool is_dsi;
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if (WARN_ON(intel_crtc->active))
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if (WARN_ON(intel_crtc->active))
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return;
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return;
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- is_dsi = intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI);
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-
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if (intel_crtc->config->has_dp_encoder)
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if (intel_crtc->config->has_dp_encoder)
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intel_dp_set_m_n(intel_crtc, M1_N1);
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intel_dp_set_m_n(intel_crtc, M1_N1);
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@@ -6181,7 +6176,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
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if (encoder->pre_pll_enable)
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if (encoder->pre_pll_enable)
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encoder->pre_pll_enable(encoder);
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encoder->pre_pll_enable(encoder);
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- if (!is_dsi) {
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+ if (!intel_crtc->config->has_dsi_encoder) {
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if (IS_CHERRYVIEW(dev)) {
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if (IS_CHERRYVIEW(dev)) {
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chv_prepare_pll(intel_crtc, intel_crtc->config);
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chv_prepare_pll(intel_crtc, intel_crtc->config);
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chv_enable_pll(intel_crtc, intel_crtc->config);
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chv_enable_pll(intel_crtc, intel_crtc->config);
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@@ -6307,7 +6302,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
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if (encoder->post_disable)
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if (encoder->post_disable)
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encoder->post_disable(encoder);
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encoder->post_disable(encoder);
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- if (!intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI)) {
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+ if (!intel_crtc->config->has_dsi_encoder) {
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if (IS_CHERRYVIEW(dev))
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if (IS_CHERRYVIEW(dev))
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chv_disable_pll(dev_priv, pipe);
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chv_disable_pll(dev_priv, pipe);
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else if (IS_VALLEYVIEW(dev))
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else if (IS_VALLEYVIEW(dev))
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@@ -7920,8 +7915,6 @@ static int i9xx_crtc_compute_clock(struct intel_crtc *crtc,
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int refclk, num_connectors = 0;
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int refclk, num_connectors = 0;
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intel_clock_t clock;
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intel_clock_t clock;
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bool ok;
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bool ok;
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- bool is_dsi = false;
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- struct intel_encoder *encoder;
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const intel_limit_t *limit;
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const intel_limit_t *limit;
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struct drm_atomic_state *state = crtc_state->base.state;
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struct drm_atomic_state *state = crtc_state->base.state;
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struct drm_connector *connector;
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struct drm_connector *connector;
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@@ -7931,26 +7924,14 @@ static int i9xx_crtc_compute_clock(struct intel_crtc *crtc,
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memset(&crtc_state->dpll_hw_state, 0,
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memset(&crtc_state->dpll_hw_state, 0,
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sizeof(crtc_state->dpll_hw_state));
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sizeof(crtc_state->dpll_hw_state));
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- for_each_connector_in_state(state, connector, connector_state, i) {
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- if (connector_state->crtc != &crtc->base)
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- continue;
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-
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- encoder = to_intel_encoder(connector_state->best_encoder);
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-
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- switch (encoder->type) {
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- case INTEL_OUTPUT_DSI:
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- is_dsi = true;
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- break;
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- default:
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- break;
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- }
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+ if (crtc_state->has_dsi_encoder)
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+ return 0;
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- num_connectors++;
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+ for_each_connector_in_state(state, connector, connector_state, i) {
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+ if (connector_state->crtc == &crtc->base)
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+ num_connectors++;
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}
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}
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- if (is_dsi)
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- return 0;
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-
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if (!crtc_state->clock_set) {
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if (!crtc_state->clock_set) {
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refclk = i9xx_get_refclk(crtc_state, num_connectors);
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refclk = i9xx_get_refclk(crtc_state, num_connectors);
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@@ -12600,6 +12581,8 @@ intel_pipe_config_compare(struct drm_device *dev,
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} else
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} else
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PIPE_CONF_CHECK_M_N_ALT(dp_m_n, dp_m2_n2);
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PIPE_CONF_CHECK_M_N_ALT(dp_m_n, dp_m2_n2);
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+ PIPE_CONF_CHECK_I(has_dsi_encoder);
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+
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PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay);
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PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay);
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PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal);
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PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal);
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PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start);
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PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start);
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