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@@ -88,7 +88,7 @@ ex_saved_reg1:
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#ifdef CONFIG_SMP
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sr r0, [ARC_REG_SCRATCH_DATA0] ; freeup r0 to code with
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GET_CPU_ID r0 ; get to per cpu scratch mem,
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- lsl r0, r0, L1_CACHE_SHIFT ; cache line wide per cpu
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+ asl r0, r0, L1_CACHE_SHIFT ; cache line wide per cpu
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add r0, @ex_saved_reg1, r0
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#else
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st r0, [@ex_saved_reg1]
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@@ -107,7 +107,7 @@ ex_saved_reg1:
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.macro TLBMISS_RESTORE_REGS
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#ifdef CONFIG_SMP
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GET_CPU_ID r0 ; get to per cpu scratch mem
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- lsl r0, r0, L1_CACHE_SHIFT ; each is cache line wide
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+ asl r0, r0, L1_CACHE_SHIFT ; each is cache line wide
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add r0, @ex_saved_reg1, r0
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ld_s r3, [r0,12]
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ld_s r2, [r0, 8]
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@@ -256,7 +256,7 @@ ex_saved_reg1:
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.macro CONV_PTE_TO_TLB
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and r3, r0, PTE_BITS_RWX ; r w x
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- lsl r2, r3, 3 ; Kr Kw Kx 0 0 0 (GLOBAL, kernel only)
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+ asl r2, r3, 3 ; Kr Kw Kx 0 0 0 (GLOBAL, kernel only)
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and.f 0, r0, _PAGE_GLOBAL
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or.z r2, r2, r3 ; Kr Kw Kx Ur Uw Ux (!GLOBAL, user page)
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