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@@ -275,6 +275,7 @@ static int __init at91_pm_init(void)
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pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
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at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC;
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+ at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP;
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if (of_machine_is_compatible("atmel,at91rm9200")) {
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/*
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@@ -286,14 +287,8 @@ static int __init at91_pm_init(void)
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at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP |
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AT91RM9200_PMC_UDP;
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at91_pm_data.memctrl = AT91_MEMCTRL_MC;
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- } else if (of_machine_is_compatible("atmel,at91sam9260") ||
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- of_machine_is_compatible("atmel,at91sam9g20") ||
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- of_machine_is_compatible("atmel,at91sam9261") ||
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- of_machine_is_compatible("atmel,at91sam9g10") ||
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- of_machine_is_compatible("atmel,at91sam9263")) {
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- at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP |
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- AT91SAM926x_PMC_UDP;
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} else if (of_machine_is_compatible("atmel,at91sam9g45")) {
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+ at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP;
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at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR;
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}
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