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@@ -95,7 +95,8 @@ void __init tegra_pmc_clk_init(void __iomem *pmc_base,
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continue;
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clk = clk_register_mux(NULL, data->mux_name, data->parents,
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- data->num_parents, CLK_SET_RATE_NO_REPARENT,
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+ data->num_parents,
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+ CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
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pmc_base + PMC_CLK_OUT_CNTRL, data->mux_shift,
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3, 0, &clk_out_lock);
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*dt_clk = clk;
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@@ -106,7 +107,8 @@ void __init tegra_pmc_clk_init(void __iomem *pmc_base,
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continue;
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clk = clk_register_gate(NULL, data->gate_name, data->mux_name,
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- 0, pmc_base + PMC_CLK_OUT_CNTRL,
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+ CLK_SET_RATE_PARENT,
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+ pmc_base + PMC_CLK_OUT_CNTRL,
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data->gate_shift, 0, &clk_out_lock);
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*dt_clk = clk;
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clk_register_clkdev(clk, data->dev_name, data->gate_name);
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