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@@ -117,7 +117,7 @@
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#define UARTSFIFO_TXOF 0x02
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#define UARTSFIFO_TXOF 0x02
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#define UARTSFIFO_RXUF 0x01
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#define UARTSFIFO_RXUF 0x01
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-/* 32-bit register defination */
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+/* 32-bit register definition */
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#define UARTBAUD 0x00
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#define UARTBAUD 0x00
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#define UARTSTAT 0x04
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#define UARTSTAT 0x04
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#define UARTCTRL 0x08
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#define UARTCTRL 0x08
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@@ -521,6 +521,57 @@ static int lpuart_poll_get_char(struct uart_port *port)
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return readb(port->membase + UARTDR);
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return readb(port->membase + UARTDR);
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}
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}
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+static int lpuart32_poll_init(struct uart_port *port)
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+{
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+ unsigned long flags;
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+ struct lpuart_port *sport = container_of(port, struct lpuart_port, port);
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+ u32 temp;
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+
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+ sport->port.fifosize = 0;
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+
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+ spin_lock_irqsave(&sport->port.lock, flags);
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+
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+ /* Disable Rx & Tx */
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+ writel(0, sport->port.membase + UARTCTRL);
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+
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+ temp = readl(sport->port.membase + UARTFIFO);
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+
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+ /* Enable Rx and Tx FIFO */
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+ writel(temp | UARTFIFO_RXFE | UARTFIFO_TXFE,
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+ sport->port.membase + UARTFIFO);
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+
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+ /* flush Tx and Rx FIFO */
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+ writel(UARTFIFO_TXFLUSH | UARTFIFO_RXFLUSH,
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+ sport->port.membase + UARTFIFO);
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+
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+ /* explicitly clear RDRF */
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+ if (readl(sport->port.membase + UARTSTAT) & UARTSTAT_RDRF) {
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+ readl(sport->port.membase + UARTDATA);
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+ writel(UARTFIFO_RXUF, sport->port.membase + UARTFIFO);
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+ }
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+
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+ /* Enable Rx and Tx */
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+ writel(UARTCTRL_RE | UARTCTRL_TE, sport->port.membase + UARTCTRL);
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+ spin_unlock_irqrestore(&sport->port.lock, flags);
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+
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+ return 0;
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+}
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+
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+static void lpuart32_poll_put_char(struct uart_port *port, unsigned char c)
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+{
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+ while (!(readl(port->membase + UARTSTAT) & UARTSTAT_TDRE))
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+ barrier();
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+
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+ writel(c, port->membase + UARTDATA);
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+}
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+
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+static int lpuart32_poll_get_char(struct uart_port *port)
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+{
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+ if (!(readl(port->membase + UARTSTAT) & UARTSTAT_RDRF))
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+ return NO_POLL_CHAR;
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+
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+ return readl(port->membase + UARTDATA);
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+}
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#endif
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#endif
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static inline void lpuart_transmit_buffer(struct lpuart_port *sport)
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static inline void lpuart_transmit_buffer(struct lpuart_port *sport)
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@@ -1776,6 +1827,11 @@ static const struct uart_ops lpuart32_pops = {
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.config_port = lpuart_config_port,
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.config_port = lpuart_config_port,
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.verify_port = lpuart_verify_port,
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.verify_port = lpuart_verify_port,
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.flush_buffer = lpuart_flush_buffer,
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.flush_buffer = lpuart_flush_buffer,
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+#if defined(CONFIG_CONSOLE_POLL)
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+ .poll_init = lpuart32_poll_init,
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+ .poll_get_char = lpuart32_poll_get_char,
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+ .poll_put_char = lpuart32_poll_put_char,
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+#endif
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};
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};
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static struct lpuart_port *lpuart_ports[UART_NR];
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static struct lpuart_port *lpuart_ports[UART_NR];
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