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@@ -48,11 +48,17 @@ static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = {
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{ 0x40a2, 0x000a },
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},
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}, {
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- ~0UL, {
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+ 216000000, {
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{ 0x00a0, 0x000a },
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{ 0x2001, 0x000f },
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{ 0x4002, 0x000f },
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},
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+ }, {
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+ ~0UL, {
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+ { 0x0000, 0x0000 },
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+ { 0x0000, 0x0000 },
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+ { 0x0000, 0x0000 },
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+ },
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}
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};
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@@ -82,7 +88,7 @@ static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
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*/
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static const struct dw_hdmi_phy_config imx_phy_config[] = {
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/*pixelclk symbol term vlev */
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- { 148500000, 0x800d, 0x0005, 0x01ad},
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+ { 216000000, 0x800d, 0x0005, 0x01ad},
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{ ~0UL, 0x0000, 0x0000, 0x0000}
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};
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@@ -148,7 +154,8 @@ static enum drm_mode_status imx6q_hdmi_mode_valid(struct drm_connector *con,
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{
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if (mode->clock < 13500)
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return MODE_CLOCK_LOW;
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- if (mode->clock > 266000)
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+ /* FIXME: Hardware is capable of 266MHz, but setup data is missing. */
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+ if (mode->clock > 216000)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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@@ -159,7 +166,8 @@ static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con,
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{
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if (mode->clock < 13500)
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return MODE_CLOCK_LOW;
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- if (mode->clock > 270000)
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+ /* FIXME: Hardware is capable of 270MHz, but setup data is missing. */
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+ if (mode->clock > 216000)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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