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@@ -50,8 +50,8 @@ static const char version[] =
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static void write_rreg(u_long base, u_int reg, u_int val)
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{
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asm volatile(
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- "str%?h %1, [%2] @ NET_RAP\n\t"
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- "str%?h %0, [%2, #-4] @ NET_RDP"
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+ "strh %1, [%2] @ NET_RAP\n\t"
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+ "strh %0, [%2, #-4] @ NET_RDP"
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:
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: "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
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}
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@@ -60,8 +60,8 @@ static inline unsigned short read_rreg(u_long base_addr, u_int reg)
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{
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unsigned short v;
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asm volatile(
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- "str%?h %1, [%2] @ NET_RAP\n\t"
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- "ldr%?h %0, [%2, #-4] @ NET_RDP"
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+ "strh %1, [%2] @ NET_RAP\n\t"
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+ "ldrh %0, [%2, #-4] @ NET_RDP"
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: "=r" (v)
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: "r" (reg), "r" (ISAIO_BASE + 0x0464));
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return v;
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@@ -70,8 +70,8 @@ static inline unsigned short read_rreg(u_long base_addr, u_int reg)
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static inline void write_ireg(u_long base, u_int reg, u_int val)
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{
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asm volatile(
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- "str%?h %1, [%2] @ NET_RAP\n\t"
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- "str%?h %0, [%2, #8] @ NET_IDP"
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+ "strh %1, [%2] @ NET_RAP\n\t"
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+ "strh %0, [%2, #8] @ NET_IDP"
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:
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: "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
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}
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@@ -80,8 +80,8 @@ static inline unsigned short read_ireg(u_long base_addr, u_int reg)
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{
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u_short v;
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asm volatile(
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- "str%?h %1, [%2] @ NAT_RAP\n\t"
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- "ldr%?h %0, [%2, #8] @ NET_IDP\n\t"
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+ "strh %1, [%2] @ NAT_RAP\n\t"
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+ "ldrh %0, [%2, #8] @ NET_IDP\n\t"
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: "=r" (v)
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: "r" (reg), "r" (ISAIO_BASE + 0x0464));
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return v;
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@@ -96,7 +96,7 @@ am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigne
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offset = ISAMEM_BASE + (offset << 1);
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length = (length + 1) & ~1;
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if ((int)buf & 2) {
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- asm volatile("str%?h %2, [%0], #4"
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+ asm volatile("strh %2, [%0], #4"
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: "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
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buf += 2;
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length -= 2;
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@@ -104,20 +104,20 @@ am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigne
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while (length > 8) {
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register unsigned int tmp asm("r2"), tmp2 asm("r3");
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asm volatile(
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- "ldm%?ia %0!, {%1, %2}"
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+ "ldmia %0!, {%1, %2}"
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: "+r" (buf), "=&r" (tmp), "=&r" (tmp2));
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length -= 8;
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asm volatile(
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- "str%?h %1, [%0], #4\n\t"
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- "mov%? %1, %1, lsr #16\n\t"
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- "str%?h %1, [%0], #4\n\t"
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- "str%?h %2, [%0], #4\n\t"
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- "mov%? %2, %2, lsr #16\n\t"
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- "str%?h %2, [%0], #4"
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+ "strh %1, [%0], #4\n\t"
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+ "mov %1, %1, lsr #16\n\t"
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+ "strh %1, [%0], #4\n\t"
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+ "strh %2, [%0], #4\n\t"
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+ "mov %2, %2, lsr #16\n\t"
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+ "strh %2, [%0], #4"
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: "+r" (offset), "=&r" (tmp), "=&r" (tmp2));
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}
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while (length > 0) {
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- asm volatile("str%?h %2, [%0], #4"
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+ asm volatile("strh %2, [%0], #4"
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: "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
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buf += 2;
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length -= 2;
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@@ -132,23 +132,23 @@ am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned
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if ((int)buf & 2) {
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unsigned int tmp;
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asm volatile(
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- "ldr%?h %2, [%0], #4\n\t"
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- "str%?b %2, [%1], #1\n\t"
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- "mov%? %2, %2, lsr #8\n\t"
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- "str%?b %2, [%1], #1"
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+ "ldrh %2, [%0], #4\n\t"
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+ "strb %2, [%1], #1\n\t"
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+ "mov %2, %2, lsr #8\n\t"
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+ "strb %2, [%1], #1"
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: "=&r" (offset), "=&r" (buf), "=r" (tmp): "0" (offset), "1" (buf));
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length -= 2;
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}
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while (length > 8) {
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register unsigned int tmp asm("r2"), tmp2 asm("r3"), tmp3;
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asm volatile(
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- "ldr%?h %2, [%0], #4\n\t"
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- "ldr%?h %4, [%0], #4\n\t"
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- "ldr%?h %3, [%0], #4\n\t"
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- "orr%? %2, %2, %4, lsl #16\n\t"
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- "ldr%?h %4, [%0], #4\n\t"
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- "orr%? %3, %3, %4, lsl #16\n\t"
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- "stm%?ia %1!, {%2, %3}"
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+ "ldrh %2, [%0], #4\n\t"
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+ "ldrh %4, [%0], #4\n\t"
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+ "ldrh %3, [%0], #4\n\t"
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+ "orr %2, %2, %4, lsl #16\n\t"
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+ "ldrh %4, [%0], #4\n\t"
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+ "orr %3, %3, %4, lsl #16\n\t"
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+ "stmia %1!, {%2, %3}"
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: "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2), "=r" (tmp3)
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: "0" (offset), "1" (buf));
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length -= 8;
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@@ -156,10 +156,10 @@ am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned
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while (length > 0) {
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unsigned int tmp;
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asm volatile(
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- "ldr%?h %2, [%0], #4\n\t"
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- "str%?b %2, [%1], #1\n\t"
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- "mov%? %2, %2, lsr #8\n\t"
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- "str%?b %2, [%1], #1"
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+ "ldrh %2, [%0], #4\n\t"
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+ "strb %2, [%1], #1\n\t"
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+ "mov %2, %2, lsr #8\n\t"
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+ "strb %2, [%1], #1"
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: "=&r" (offset), "=&r" (buf), "=r" (tmp) : "0" (offset), "1" (buf));
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length -= 2;
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}
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