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@@ -245,22 +245,12 @@ ENTRY(stext)
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bl __calc_phys_offset // x24=PHYS_OFFSET, x28=PHYS_OFFSET-PAGE_OFFSET
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bl __calc_phys_offset // x24=PHYS_OFFSET, x28=PHYS_OFFSET-PAGE_OFFSET
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bl set_cpu_boot_mode_flag
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bl set_cpu_boot_mode_flag
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mrs x22, midr_el1 // x22=cpuid
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mrs x22, midr_el1 // x22=cpuid
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- mov x0, x22
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- bl lookup_processor_type
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- mov x23, x0 // x23=current cpu_table
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- /*
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- * __error_p may end up out of range for cbz if text areas are
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- * aligned up to section sizes.
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- */
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- cbnz x23, 1f // invalid processor (x23=0)?
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- b __error_p
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-1:
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+
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bl __vet_fdt
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bl __vet_fdt
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bl __create_page_tables // x25=TTBR0, x26=TTBR1
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bl __create_page_tables // x25=TTBR0, x26=TTBR1
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/*
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/*
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- * The following calls CPU specific code in a position independent
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- * manner. See arch/arm64/mm/proc.S for details. x23 = base of
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- * cpu_info structure selected by lookup_processor_type above.
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+ * The following calls CPU setup code, see arch/arm64/mm/proc.S for
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+ * details.
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* On return, the CPU will be ready for the MMU to be turned on and
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* On return, the CPU will be ready for the MMU to be turned on and
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* the TCR will have been set.
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* the TCR will have been set.
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*/
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*/
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@@ -268,9 +258,7 @@ ENTRY(stext)
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// MMU has been enabled
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// MMU has been enabled
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adrp lr, __enable_mmu // return (PIC) address
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adrp lr, __enable_mmu // return (PIC) address
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add lr, lr, #:lo12:__enable_mmu
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add lr, lr, #:lo12:__enable_mmu
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- ldr x12, [x23, #CPU_INFO_SETUP]
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- add x12, x12, x28 // __virt_to_phys
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- br x12 // initialise processor
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+ b __cpu_setup // initialise processor
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ENDPROC(stext)
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ENDPROC(stext)
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/*
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/*
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@@ -634,15 +622,9 @@ ENTRY(secondary_startup)
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* Common entry point for secondary CPUs.
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* Common entry point for secondary CPUs.
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*/
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*/
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mrs x22, midr_el1 // x22=cpuid
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mrs x22, midr_el1 // x22=cpuid
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- mov x0, x22
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- bl lookup_processor_type
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- mov x23, x0 // x23=current cpu_table
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- cbz x23, __error_p // invalid processor (x23=0)?
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pgtbl x25, x26, x28 // x25=TTBR0, x26=TTBR1
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pgtbl x25, x26, x28 // x25=TTBR0, x26=TTBR1
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- ldr x12, [x23, #CPU_INFO_SETUP]
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- add x12, x12, x28 // __virt_to_phys
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- blr x12 // initialise processor
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+ bl __cpu_setup // initialise processor
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ldr x21, =secondary_data
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ldr x21, =secondary_data
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ldr x27, =__secondary_switched // address to jump to after enabling the MMU
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ldr x27, =__secondary_switched // address to jump to after enabling the MMU
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@@ -708,51 +690,3 @@ ENDPROC(__calc_phys_offset)
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.align 3
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.align 3
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1: .quad .
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1: .quad .
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.quad PAGE_OFFSET
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.quad PAGE_OFFSET
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-
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-/*
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- * Exception handling. Something went wrong and we can't proceed. We ought to
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- * tell the user, but since we don't have any guarantee that we're even
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- * running on the right architecture, we do virtually nothing.
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- */
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-__error_p:
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-ENDPROC(__error_p)
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-
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-__error:
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-1: nop
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- b 1b
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-ENDPROC(__error)
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-
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-/*
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- * This function gets the processor ID in w0 and searches the cpu_table[] for
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- * a match. It returns a pointer to the struct cpu_info it found. The
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- * cpu_table[] must end with an empty (all zeros) structure.
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- *
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- * This routine can be called via C code and it needs to work with the MMU
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- * both disabled and enabled (the offset is calculated automatically).
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- */
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-ENTRY(lookup_processor_type)
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- adr x1, __lookup_processor_type_data
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- ldp x2, x3, [x1]
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- sub x1, x1, x2 // get offset between VA and PA
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- add x3, x3, x1 // convert VA to PA
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-1:
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- ldp w5, w6, [x3] // load cpu_id_val and cpu_id_mask
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- cbz w5, 2f // end of list?
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- and w6, w6, w0
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- cmp w5, w6
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- b.eq 3f
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- add x3, x3, #CPU_INFO_SZ
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- b 1b
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-2:
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- mov x3, #0 // unknown processor
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-3:
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- mov x0, x3
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- ret
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-ENDPROC(lookup_processor_type)
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-
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- .align 3
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- .type __lookup_processor_type_data, %object
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-__lookup_processor_type_data:
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- .quad .
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- .quad cpu_table
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- .size __lookup_processor_type_data, . - __lookup_processor_type_data
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