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@@ -446,12 +446,16 @@ static int stm32_sai_set_config(struct snd_soc_dai *cpu_dai,
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{
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struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai);
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int cr1, cr1_mask, ret;
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- int fth = STM_SAI_FIFO_TH_HALF;
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- /* FIFO config */
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+ /*
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+ * DMA bursts increment is set to 4 words.
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+ * SAI fifo threshold is set to half fifo, to keep enough space
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+ * for DMA incoming bursts.
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+ */
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regmap_update_bits(sai->regmap, STM_SAI_CR2_REGX,
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SAI_XCR2_FFLUSH | SAI_XCR2_FTH_MASK,
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- SAI_XCR2_FFLUSH | SAI_XCR2_FTH_SET(fth));
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+ SAI_XCR2_FFLUSH |
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+ SAI_XCR2_FTH_SET(STM_SAI_FIFO_TH_HALF));
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/* Mode, data format and channel config */
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cr1 = SAI_XCR1_PRTCFG_SET(SAI_FREE_PROTOCOL);
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@@ -485,10 +489,6 @@ static int stm32_sai_set_config(struct snd_soc_dai *cpu_dai,
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return ret;
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}
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- /* DMA config */
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- sai->dma_params.maxburst = STM_SAI_FIFO_SIZE * fth / sizeof(u32);
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- snd_soc_dai_set_dma_data(cpu_dai, substream, (void *)&sai->dma_params);
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-
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return 0;
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}
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@@ -731,7 +731,12 @@ static int stm32_sai_dai_probe(struct snd_soc_dai *cpu_dai)
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struct stm32_sai_sub_data *sai = dev_get_drvdata(cpu_dai->dev);
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sai->dma_params.addr = (dma_addr_t)(sai->phys_addr + STM_SAI_DR_REGX);
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- sai->dma_params.maxburst = 1;
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+ /*
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+ * DMA supports 4, 8 or 16 burst sizes. Burst size 4 is the best choice,
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+ * as it allows bytes, half-word and words transfers. (See DMA fifos
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+ * constraints).
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+ */
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+ sai->dma_params.maxburst = 4;
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/* Buswidth will be set by framework at runtime */
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sai->dma_params.addr_width = DMA_SLAVE_BUSWIDTH_UNDEFINED;
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