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@@ -125,21 +125,8 @@ struct azx;
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/* Functions to read/write to hda registers. */
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struct hda_controller_ops {
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- /* Register Access */
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- void (*reg_writel)(u32 value, u32 __iomem *addr);
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- u32 (*reg_readl)(u32 __iomem *addr);
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- void (*reg_writew)(u16 value, u16 __iomem *addr);
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- u16 (*reg_readw)(u16 __iomem *addr);
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- void (*reg_writeb)(u8 value, u8 __iomem *addr);
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- u8 (*reg_readb)(u8 __iomem *addr);
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/* Disable msi if supported, PCI only */
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int (*disable_msi_reset_irq)(struct azx *);
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- /* Allocation ops */
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- int (*dma_alloc_pages)(struct azx *chip,
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- int type,
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- size_t size,
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- struct snd_dma_buffer *buf);
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- void (*dma_free_pages)(struct azx *chip, struct snd_dma_buffer *buf);
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int (*substream_alloc_pages)(struct azx *chip,
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struct snd_pcm_substream *substream,
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size_t size);
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@@ -179,6 +166,7 @@ struct azx {
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/* Register interaction. */
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const struct hda_controller_ops *ops;
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+ const struct hdac_io_ops *io_ops;
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/* position adjustment callbacks */
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azx_get_pos_callback_t get_position[2];
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@@ -239,6 +227,8 @@ struct azx {
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#endif
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};
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+#define azx_bus(chip) (&(chip)->bus->core)
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+
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#ifdef CONFIG_X86
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#define azx_snoop(chip) ((chip)->snoop)
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#else
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@@ -250,30 +240,30 @@ struct azx {
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*/
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#define azx_writel(chip, reg, value) \
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- ((chip)->ops->reg_writel(value, (chip)->remap_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_writel(value, (chip)->remap_addr + AZX_REG_##reg))
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#define azx_readl(chip, reg) \
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- ((chip)->ops->reg_readl((chip)->remap_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_readl((chip)->remap_addr + AZX_REG_##reg))
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#define azx_writew(chip, reg, value) \
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- ((chip)->ops->reg_writew(value, (chip)->remap_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_writew(value, (chip)->remap_addr + AZX_REG_##reg))
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#define azx_readw(chip, reg) \
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- ((chip)->ops->reg_readw((chip)->remap_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_readw((chip)->remap_addr + AZX_REG_##reg))
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#define azx_writeb(chip, reg, value) \
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- ((chip)->ops->reg_writeb(value, (chip)->remap_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_writeb(value, (chip)->remap_addr + AZX_REG_##reg))
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#define azx_readb(chip, reg) \
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- ((chip)->ops->reg_readb((chip)->remap_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_readb((chip)->remap_addr + AZX_REG_##reg))
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#define azx_sd_writel(chip, dev, reg, value) \
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- ((chip)->ops->reg_writel(value, (dev)->sd_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_writel(value, (dev)->sd_addr + AZX_REG_##reg))
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#define azx_sd_readl(chip, dev, reg) \
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- ((chip)->ops->reg_readl((dev)->sd_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_readl((dev)->sd_addr + AZX_REG_##reg))
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#define azx_sd_writew(chip, dev, reg, value) \
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- ((chip)->ops->reg_writew(value, (dev)->sd_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_writew(value, (dev)->sd_addr + AZX_REG_##reg))
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#define azx_sd_readw(chip, dev, reg) \
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- ((chip)->ops->reg_readw((dev)->sd_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_readw((dev)->sd_addr + AZX_REG_##reg))
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#define azx_sd_writeb(chip, dev, reg, value) \
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- ((chip)->ops->reg_writeb(value, (dev)->sd_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_writeb(value, (dev)->sd_addr + AZX_REG_##reg))
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#define azx_sd_readb(chip, dev, reg) \
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- ((chip)->ops->reg_readb((dev)->sd_addr + AZX_REG_##reg))
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+ ((chip)->io_ops->reg_readb((dev)->sd_addr + AZX_REG_##reg))
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#define azx_has_pm_runtime(chip) \
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(!AZX_DCAPS_PM_RUNTIME || ((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME))
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