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@@ -142,7 +142,8 @@ static int radeon_process_aux_ch(struct radeon_i2c_chan *chan,
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return recv_bytes;
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return recv_bytes;
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}
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}
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-#define HEADER_SIZE 4
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+#define BARE_ADDRESS_SIZE 3
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+#define HEADER_SIZE (BARE_ADDRESS_SIZE + 1)
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static ssize_t
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static ssize_t
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radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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@@ -160,13 +161,19 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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tx_buf[0] = msg->address & 0xff;
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tx_buf[0] = msg->address & 0xff;
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tx_buf[1] = msg->address >> 8;
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tx_buf[1] = msg->address >> 8;
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tx_buf[2] = msg->request << 4;
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tx_buf[2] = msg->request << 4;
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- tx_buf[3] = msg->size - 1;
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+ tx_buf[3] = msg->size ? (msg->size - 1) : 0;
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switch (msg->request & ~DP_AUX_I2C_MOT) {
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switch (msg->request & ~DP_AUX_I2C_MOT) {
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case DP_AUX_NATIVE_WRITE:
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case DP_AUX_NATIVE_WRITE:
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case DP_AUX_I2C_WRITE:
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case DP_AUX_I2C_WRITE:
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+ /* tx_size needs to be 4 even for bare address packets since the atom
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+ * table needs the info in tx_buf[3].
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+ */
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tx_size = HEADER_SIZE + msg->size;
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tx_size = HEADER_SIZE + msg->size;
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- tx_buf[3] |= tx_size << 4;
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+ if (msg->size == 0)
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+ tx_buf[3] |= BARE_ADDRESS_SIZE << 4;
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+ else
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+ tx_buf[3] |= tx_size << 4;
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memcpy(tx_buf + HEADER_SIZE, msg->buffer, msg->size);
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memcpy(tx_buf + HEADER_SIZE, msg->buffer, msg->size);
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ret = radeon_process_aux_ch(chan,
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ret = radeon_process_aux_ch(chan,
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tx_buf, tx_size, NULL, 0, delay, &ack);
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tx_buf, tx_size, NULL, 0, delay, &ack);
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@@ -176,8 +183,14 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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break;
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break;
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case DP_AUX_NATIVE_READ:
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case DP_AUX_NATIVE_READ:
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case DP_AUX_I2C_READ:
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case DP_AUX_I2C_READ:
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+ /* tx_size needs to be 4 even for bare address packets since the atom
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+ * table needs the info in tx_buf[3].
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+ */
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tx_size = HEADER_SIZE;
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tx_size = HEADER_SIZE;
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- tx_buf[3] |= tx_size << 4;
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+ if (msg->size == 0)
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+ tx_buf[3] |= BARE_ADDRESS_SIZE << 4;
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+ else
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+ tx_buf[3] |= tx_size << 4;
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ret = radeon_process_aux_ch(chan,
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ret = radeon_process_aux_ch(chan,
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tx_buf, tx_size, msg->buffer, msg->size, delay, &ack);
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tx_buf, tx_size, msg->buffer, msg->size, delay, &ack);
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break;
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break;
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@@ -186,7 +199,7 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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break;
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break;
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}
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}
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- if (ret > 0)
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+ if (ret >= 0)
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msg->reply = ack >> 4;
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msg->reply = ack >> 4;
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return ret;
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return ret;
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@@ -194,98 +207,15 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
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void radeon_dp_aux_init(struct radeon_connector *radeon_connector)
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void radeon_dp_aux_init(struct radeon_connector *radeon_connector)
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{
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{
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- struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
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-
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- dig_connector->dp_i2c_bus->aux.dev = radeon_connector->base.kdev;
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- dig_connector->dp_i2c_bus->aux.transfer = radeon_dp_aux_transfer;
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-}
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-
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-int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
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- u8 write_byte, u8 *read_byte)
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-{
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- struct i2c_algo_dp_aux_data *algo_data = adapter->algo_data;
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- struct radeon_i2c_chan *auxch = i2c_get_adapdata(adapter);
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- u16 address = algo_data->address;
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- u8 msg[5];
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- u8 reply[2];
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- unsigned retry;
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- int msg_bytes;
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- int reply_bytes = 1;
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int ret;
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int ret;
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- u8 ack;
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-
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- /* Set up the address */
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- msg[0] = address;
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- msg[1] = address >> 8;
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-
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- /* Set up the command byte */
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- if (mode & MODE_I2C_READ) {
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- msg[2] = DP_AUX_I2C_READ << 4;
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- msg_bytes = 4;
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- msg[3] = msg_bytes << 4;
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- } else {
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- msg[2] = DP_AUX_I2C_WRITE << 4;
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- msg_bytes = 5;
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- msg[3] = msg_bytes << 4;
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- msg[4] = write_byte;
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- }
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-
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- /* special handling for start/stop */
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- if (mode & (MODE_I2C_START | MODE_I2C_STOP))
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- msg[3] = 3 << 4;
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-
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- /* Set MOT bit for all but stop */
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- if ((mode & MODE_I2C_STOP) == 0)
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- msg[2] |= DP_AUX_I2C_MOT << 4;
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-
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- for (retry = 0; retry < 7; retry++) {
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- ret = radeon_process_aux_ch(auxch,
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- msg, msg_bytes, reply, reply_bytes, 0, &ack);
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- if (ret == -EBUSY)
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- continue;
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- else if (ret < 0) {
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- DRM_DEBUG_KMS("aux_ch failed %d\n", ret);
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- return ret;
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- }
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-
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- switch ((ack >> 4) & DP_AUX_NATIVE_REPLY_MASK) {
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- case DP_AUX_NATIVE_REPLY_ACK:
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- /* I2C-over-AUX Reply field is only valid
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- * when paired with AUX ACK.
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- */
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- break;
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- case DP_AUX_NATIVE_REPLY_NACK:
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- DRM_DEBUG_KMS("aux_ch native nack\n");
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- return -EREMOTEIO;
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- case DP_AUX_NATIVE_REPLY_DEFER:
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- DRM_DEBUG_KMS("aux_ch native defer\n");
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- usleep_range(500, 600);
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- continue;
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- default:
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- DRM_ERROR("aux_ch invalid native reply 0x%02x\n", ack);
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- return -EREMOTEIO;
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- }
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- switch ((ack >> 4) & DP_AUX_I2C_REPLY_MASK) {
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- case DP_AUX_I2C_REPLY_ACK:
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- if (mode == MODE_I2C_READ)
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- *read_byte = reply[0];
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- return ret;
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- case DP_AUX_I2C_REPLY_NACK:
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- DRM_DEBUG_KMS("aux_i2c nack\n");
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- return -EREMOTEIO;
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- case DP_AUX_I2C_REPLY_DEFER:
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- DRM_DEBUG_KMS("aux_i2c defer\n");
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- usleep_range(400, 500);
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- break;
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- default:
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- DRM_ERROR("aux_i2c invalid reply 0x%02x\n", ack);
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- return -EREMOTEIO;
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- }
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- }
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+ radeon_connector->ddc_bus->aux.dev = radeon_connector->base.kdev;
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+ radeon_connector->ddc_bus->aux.transfer = radeon_dp_aux_transfer;
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+ ret = drm_dp_aux_register_i2c_bus(&radeon_connector->ddc_bus->aux);
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+ if (!ret)
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+ radeon_connector->ddc_bus->has_aux = true;
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- DRM_DEBUG_KMS("aux i2c too many retries, giving up\n");
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- return -EREMOTEIO;
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+ WARN(ret, "drm_dp_aux_register_i2c_bus() failed with error %d\n", ret);
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}
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}
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/***** general DP utility functions *****/
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/***** general DP utility functions *****/
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@@ -420,12 +350,11 @@ static u8 radeon_dp_encoder_service(struct radeon_device *rdev,
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u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector)
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u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector)
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{
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{
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- struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
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struct drm_device *dev = radeon_connector->base.dev;
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struct drm_device *dev = radeon_connector->base.dev;
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_device *rdev = dev->dev_private;
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return radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_GET_SINK_TYPE, 0,
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return radeon_dp_encoder_service(rdev, ATOM_DP_ACTION_GET_SINK_TYPE, 0,
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- dig_connector->dp_i2c_bus->rec.i2c_id, 0);
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+ radeon_connector->ddc_bus->rec.i2c_id, 0);
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}
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}
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static void radeon_dp_probe_oui(struct radeon_connector *radeon_connector)
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static void radeon_dp_probe_oui(struct radeon_connector *radeon_connector)
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@@ -436,11 +365,11 @@ static void radeon_dp_probe_oui(struct radeon_connector *radeon_connector)
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if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))
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if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))
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return;
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return;
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- if (drm_dp_dpcd_read(&dig_connector->dp_i2c_bus->aux, DP_SINK_OUI, buf, 3))
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+ if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3))
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DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n",
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DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n",
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buf[0], buf[1], buf[2]);
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buf[0], buf[1], buf[2]);
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- if (drm_dp_dpcd_read(&dig_connector->dp_i2c_bus->aux, DP_BRANCH_OUI, buf, 3))
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+ if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3))
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DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n",
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DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n",
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buf[0], buf[1], buf[2]);
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buf[0], buf[1], buf[2]);
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}
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}
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@@ -451,7 +380,7 @@ bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector)
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u8 msg[DP_DPCD_SIZE];
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u8 msg[DP_DPCD_SIZE];
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int ret, i;
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int ret, i;
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- ret = drm_dp_dpcd_read(&dig_connector->dp_i2c_bus->aux, DP_DPCD_REV, msg,
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+ ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_DPCD_REV, msg,
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DP_DPCD_SIZE);
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DP_DPCD_SIZE);
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if (ret > 0) {
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if (ret > 0) {
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memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE);
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memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE);
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@@ -489,7 +418,7 @@ int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
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if (dp_bridge != ENCODER_OBJECT_ID_NONE) {
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if (dp_bridge != ENCODER_OBJECT_ID_NONE) {
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/* DP bridge chips */
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/* DP bridge chips */
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- drm_dp_dpcd_readb(&dig_connector->dp_i2c_bus->aux,
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+ drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux,
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DP_EDP_CONFIGURATION_CAP, &tmp);
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DP_EDP_CONFIGURATION_CAP, &tmp);
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if (tmp & 1)
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if (tmp & 1)
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panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
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panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
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@@ -500,7 +429,7 @@ int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
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panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE;
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panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE;
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} else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
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} else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
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/* eDP */
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/* eDP */
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- drm_dp_dpcd_readb(&dig_connector->dp_i2c_bus->aux,
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+ drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux,
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DP_EDP_CONFIGURATION_CAP, &tmp);
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DP_EDP_CONFIGURATION_CAP, &tmp);
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if (tmp & 1)
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if (tmp & 1)
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panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
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panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
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@@ -554,7 +483,8 @@ bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector)
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u8 link_status[DP_LINK_STATUS_SIZE];
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u8 link_status[DP_LINK_STATUS_SIZE];
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struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
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struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
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- if (drm_dp_dpcd_read_link_status(&dig->dp_i2c_bus->aux, link_status) <= 0)
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+ if (drm_dp_dpcd_read_link_status(&radeon_connector->ddc_bus->aux, link_status)
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+ <= 0)
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return false;
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return false;
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if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count))
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if (drm_dp_channel_eq_ok(link_status, dig->dp_lane_count))
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return false;
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return false;
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@@ -574,7 +504,7 @@ void radeon_dp_set_rx_power_state(struct drm_connector *connector,
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/* power up/down the sink */
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/* power up/down the sink */
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if (dig_connector->dpcd[0] >= 0x11) {
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if (dig_connector->dpcd[0] >= 0x11) {
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- drm_dp_dpcd_writeb(&dig_connector->dp_i2c_bus->aux,
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+ drm_dp_dpcd_writeb(&radeon_connector->ddc_bus->aux,
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DP_SET_POWER, power_state);
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DP_SET_POWER, power_state);
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usleep_range(1000, 2000);
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usleep_range(1000, 2000);
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}
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}
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@@ -878,7 +808,7 @@ void radeon_dp_link_train(struct drm_encoder *encoder,
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else
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else
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dp_info.enc_id |= ATOM_DP_CONFIG_LINK_A;
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dp_info.enc_id |= ATOM_DP_CONFIG_LINK_A;
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- drm_dp_dpcd_readb(&dig_connector->dp_i2c_bus->aux, DP_MAX_LANE_COUNT, &tmp);
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+ drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp);
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if (ASIC_IS_DCE5(rdev) && (tmp & DP_TPS3_SUPPORTED))
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if (ASIC_IS_DCE5(rdev) && (tmp & DP_TPS3_SUPPORTED))
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dp_info.tp3_supported = true;
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dp_info.tp3_supported = true;
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else
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else
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@@ -890,7 +820,7 @@ void radeon_dp_link_train(struct drm_encoder *encoder,
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dp_info.connector = connector;
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dp_info.connector = connector;
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dp_info.dp_lane_count = dig_connector->dp_lane_count;
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dp_info.dp_lane_count = dig_connector->dp_lane_count;
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dp_info.dp_clock = dig_connector->dp_clock;
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dp_info.dp_clock = dig_connector->dp_clock;
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- dp_info.aux = &dig_connector->dp_i2c_bus->aux;
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+ dp_info.aux = &radeon_connector->ddc_bus->aux;
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if (radeon_dp_link_train_init(&dp_info))
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if (radeon_dp_link_train_init(&dp_info))
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goto done;
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goto done;
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