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@@ -174,6 +174,10 @@
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/* HW dma structures */
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/* Delivery queue header */
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/* dw0 */
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+#define CMD_HDR_ABORT_FLAG_OFF 0
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+#define CMD_HDR_ABORT_FLAG_MSK (0x3 << CMD_HDR_ABORT_FLAG_OFF)
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+#define CMD_HDR_ABORT_DEVICE_TYPE_OFF 2
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+#define CMD_HDR_ABORT_DEVICE_TYPE_MSK (0x1 << CMD_HDR_ABORT_DEVICE_TYPE_OFF)
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#define CMD_HDR_RESP_REPORT_OFF 5
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#define CMD_HDR_RESP_REPORT_MSK (0x1 << CMD_HDR_RESP_REPORT_OFF)
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#define CMD_HDR_TLR_CTRL_OFF 6
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@@ -214,6 +218,8 @@
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#define CMD_HDR_DIF_SGL_LEN_MSK (0xffff << CMD_HDR_DIF_SGL_LEN_OFF)
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#define CMD_HDR_DATA_SGL_LEN_OFF 16
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#define CMD_HDR_DATA_SGL_LEN_MSK (0xffff << CMD_HDR_DATA_SGL_LEN_OFF)
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+#define CMD_HDR_ABORT_IPTT_OFF 16
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+#define CMD_HDR_ABORT_IPTT_MSK (0xffff << CMD_HDR_ABORT_IPTT_OFF)
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/* Completion header */
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/* dw0 */
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@@ -1775,6 +1781,32 @@ static int prep_ata_v2_hw(struct hisi_hba *hisi_hba,
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return 0;
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}
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+static int prep_abort_v2_hw(struct hisi_hba *hisi_hba,
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+ struct hisi_sas_slot *slot,
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+ int device_id, int abort_flag, int tag_to_abort)
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+{
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+ struct sas_task *task = slot->task;
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+ struct domain_device *dev = task->dev;
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+ struct hisi_sas_cmd_hdr *hdr = slot->cmd_hdr;
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+ struct hisi_sas_port *port = slot->port;
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+
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+ /* dw0 */
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+ hdr->dw0 = cpu_to_le32((5 << CMD_HDR_CMD_OFF) | /*abort*/
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+ (port->id << CMD_HDR_PORT_OFF) |
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+ ((dev_is_sata(dev) ? 1:0) <<
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+ CMD_HDR_ABORT_DEVICE_TYPE_OFF) |
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+ (abort_flag << CMD_HDR_ABORT_FLAG_OFF));
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+
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+ /* dw1 */
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+ hdr->dw1 = cpu_to_le32(device_id << CMD_HDR_DEV_ID_OFF);
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+
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+ /* dw7 */
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+ hdr->dw7 = cpu_to_le32(tag_to_abort << CMD_HDR_ABORT_IPTT_OFF);
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+ hdr->transfer_tags = cpu_to_le32(slot->idx);
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+
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+ return 0;
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+}
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+
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static int phy_up_v2_hw(int phy_no, struct hisi_hba *hisi_hba)
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{
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int i, res = 0;
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@@ -2239,6 +2271,7 @@ static const struct hisi_sas_hw hisi_sas_v2_hw = {
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.prep_smp = prep_smp_v2_hw,
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.prep_ssp = prep_ssp_v2_hw,
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.prep_stp = prep_ata_v2_hw,
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+ .prep_abort = prep_abort_v2_hw,
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.get_free_slot = get_free_slot_v2_hw,
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.start_delivery = start_delivery_v2_hw,
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.slot_complete = slot_complete_v2_hw,
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