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ath9k: do not link receive buffers during flush

On AR9300 the rx FIFO needs to be empty during reset to ensure that no
further DMA activity is generated, otherwise it might lead to memory
corruption issues.

Cc: stable@vger.kernel.org
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Felix Fietkau 12 anni fa
parent
commit
a3dc48e82b
1 ha cambiato i file con 6 aggiunte e 4 eliminazioni
  1. 6 4
      drivers/net/wireless/ath/ath9k/recv.c

+ 6 - 4
drivers/net/wireless/ath/ath9k/recv.c

@@ -744,6 +744,7 @@ static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
 			return NULL;
 			return NULL;
 	}
 	}
 
 
+	list_del(&bf->list);
 	if (!bf->bf_mpdu)
 	if (!bf->bf_mpdu)
 		return bf;
 		return bf;
 
 
@@ -1254,14 +1255,15 @@ requeue_drop_frag:
 			sc->rx.frag = NULL;
 			sc->rx.frag = NULL;
 		}
 		}
 requeue:
 requeue:
+		list_add_tail(&bf->list, &sc->rx.rxbuf);
+		if (flush)
+			continue;
+
 		if (edma) {
 		if (edma) {
-			list_add_tail(&bf->list, &sc->rx.rxbuf);
 			ath_rx_edma_buf_link(sc, qtype);
 			ath_rx_edma_buf_link(sc, qtype);
 		} else {
 		} else {
-			list_move_tail(&bf->list, &sc->rx.rxbuf);
 			ath_rx_buf_link(sc, bf);
 			ath_rx_buf_link(sc, bf);
-			if (!flush)
-				ath9k_hw_rxena(ah);
+			ath9k_hw_rxena(ah);
 		}
 		}
 	} while (1);
 	} while (1);