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@@ -4077,7 +4077,6 @@ __init int intel_pmu_init(void)
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intel_pmu_lbr_init_skl();
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intel_pmu_lbr_init_skl();
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x86_pmu.event_constraints = intel_slm_event_constraints;
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x86_pmu.event_constraints = intel_slm_event_constraints;
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- x86_pmu.pebs_constraints = intel_glp_pebs_event_constraints;
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x86_pmu.extra_regs = intel_glm_extra_regs;
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x86_pmu.extra_regs = intel_glm_extra_regs;
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/*
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/*
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* It's recommended to use CPU_CLK_UNHALTED.CORE_P + NPEBS
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* It's recommended to use CPU_CLK_UNHALTED.CORE_P + NPEBS
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@@ -4087,6 +4086,7 @@ __init int intel_pmu_init(void)
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x86_pmu.pebs_prec_dist = true;
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x86_pmu.pebs_prec_dist = true;
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x86_pmu.lbr_pt_coexist = true;
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x86_pmu.lbr_pt_coexist = true;
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x86_pmu.flags |= PMU_FL_HAS_RSP_1;
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x86_pmu.flags |= PMU_FL_HAS_RSP_1;
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+ x86_pmu.flags |= PMU_FL_PEBS_ALL;
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x86_pmu.get_event_constraints = glp_get_event_constraints;
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x86_pmu.get_event_constraints = glp_get_event_constraints;
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x86_pmu.cpu_events = glm_events_attrs;
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x86_pmu.cpu_events = glm_events_attrs;
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/* Goldmont Plus has 4-wide pipeline */
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/* Goldmont Plus has 4-wide pipeline */
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