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@@ -2,7 +2,7 @@
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/*
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* handling privileged instructions
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*
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- * Copyright IBM Corp. 2008, 2013
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+ * Copyright IBM Corp. 2008, 2018
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*
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* Author(s): Carsten Otte <cotte@de.ibm.com>
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* Christian Borntraeger <borntraeger@de.ibm.com>
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@@ -34,6 +34,8 @@
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static int handle_ri(struct kvm_vcpu *vcpu)
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{
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+ vcpu->stat.instruction_ri++;
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+
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if (test_kvm_facility(vcpu->kvm, 64)) {
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VCPU_EVENT(vcpu, 3, "%s", "ENABLE: RI (lazy)");
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vcpu->arch.sie_block->ecb3 |= ECB3_RI;
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@@ -53,6 +55,8 @@ int kvm_s390_handle_aa(struct kvm_vcpu *vcpu)
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static int handle_gs(struct kvm_vcpu *vcpu)
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{
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+ vcpu->stat.instruction_gs++;
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+
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if (test_kvm_facility(vcpu->kvm, 133)) {
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VCPU_EVENT(vcpu, 3, "%s", "ENABLE: GS (lazy)");
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preempt_disable();
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@@ -85,6 +89,8 @@ static int handle_set_clock(struct kvm_vcpu *vcpu)
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u8 ar;
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u64 op2, val;
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+ vcpu->stat.instruction_sck++;
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+
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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@@ -222,7 +228,6 @@ static int try_handle_skey(struct kvm_vcpu *vcpu)
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{
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int rc;
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- vcpu->stat.instruction_storage_key++;
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rc = kvm_s390_skey_check_enable(vcpu);
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if (rc)
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return rc;
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@@ -242,6 +247,8 @@ static int handle_iske(struct kvm_vcpu *vcpu)
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int reg1, reg2;
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int rc;
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+ vcpu->stat.instruction_iske++;
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+
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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@@ -274,6 +281,8 @@ static int handle_rrbe(struct kvm_vcpu *vcpu)
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int reg1, reg2;
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int rc;
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+ vcpu->stat.instruction_rrbe++;
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+
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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@@ -312,6 +321,8 @@ static int handle_sske(struct kvm_vcpu *vcpu)
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int reg1, reg2;
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int rc;
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+ vcpu->stat.instruction_sske++;
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+
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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@@ -392,6 +403,8 @@ static int handle_test_block(struct kvm_vcpu *vcpu)
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gpa_t addr;
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int reg2;
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+ vcpu->stat.instruction_tb++;
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+
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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@@ -424,6 +437,8 @@ static int handle_tpi(struct kvm_vcpu *vcpu)
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u64 addr;
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u8 ar;
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+ vcpu->stat.instruction_tpi++;
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+
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addr = kvm_s390_get_base_disp_s(vcpu, &ar);
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if (addr & 3)
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return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
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@@ -484,6 +499,8 @@ static int handle_tsch(struct kvm_vcpu *vcpu)
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struct kvm_s390_interrupt_info *inti = NULL;
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const u64 isc_mask = 0xffUL << 24; /* all iscs set */
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+ vcpu->stat.instruction_tsch++;
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+
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/* a valid schid has at least one bit set */
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if (vcpu->run->s.regs.gprs[1])
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inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask,
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@@ -527,6 +544,7 @@ static int handle_io_inst(struct kvm_vcpu *vcpu)
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if (vcpu->arch.sie_block->ipa == 0xb235)
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return handle_tsch(vcpu);
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/* Handle in userspace. */
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+ vcpu->stat.instruction_io_other++;
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return -EOPNOTSUPP;
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} else {
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/*
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@@ -592,6 +610,8 @@ int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
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int rc;
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u8 ar;
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+ vcpu->stat.instruction_lpsw++;
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+
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if (gpsw->mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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@@ -619,6 +639,8 @@ static int handle_lpswe(struct kvm_vcpu *vcpu)
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int rc;
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u8 ar;
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+ vcpu->stat.instruction_lpswe++;
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+
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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@@ -828,6 +850,8 @@ static int handle_epsw(struct kvm_vcpu *vcpu)
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{
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int reg1, reg2;
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+ vcpu->stat.instruction_epsw++;
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+
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kvm_s390_get_regs_rre(vcpu, ®1, ®2);
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/* This basically extracts the mask half of the psw. */
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@@ -1332,6 +1356,8 @@ static int handle_sckpf(struct kvm_vcpu *vcpu)
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{
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u32 value;
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+ vcpu->stat.instruction_sckpf++;
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+
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if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
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return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
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@@ -1347,6 +1373,8 @@ static int handle_sckpf(struct kvm_vcpu *vcpu)
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static int handle_ptff(struct kvm_vcpu *vcpu)
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{
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+ vcpu->stat.instruction_ptff++;
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+
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/* we don't emulate any control instructions yet */
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kvm_s390_set_psw_cc(vcpu, 3);
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return 0;
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