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@@ -5,10 +5,100 @@
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*
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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*/
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+#include <linux/clockchips.h>
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#include <linux/init.h>
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#include <linux/init.h>
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+#include <linux/interrupt.h>
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#include <linux/irqchip/mips-gic.h>
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#include <linux/irqchip/mips-gic.h>
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+#include <linux/percpu.h>
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+#include <linux/smp.h>
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#include <linux/time.h>
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#include <linux/time.h>
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+#include <asm/time.h>
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+
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+DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
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+int gic_timer_irq_installed;
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+
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+static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
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+{
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+ u64 cnt;
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+ int res;
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+
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+ cnt = gic_read_count();
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+ cnt += (u64)delta;
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+ gic_write_cpu_compare(cnt, cpumask_first(evt->cpumask));
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+ res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
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+ return res;
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+}
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+
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+void gic_set_clock_mode(enum clock_event_mode mode,
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+ struct clock_event_device *evt)
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+{
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+ /* Nothing to do ... */
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+}
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+
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+irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
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+{
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+ struct clock_event_device *cd;
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+ int cpu = smp_processor_id();
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+
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+ gic_write_compare(gic_read_compare());
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+ cd = &per_cpu(gic_clockevent_device, cpu);
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+ cd->event_handler(cd);
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+ return IRQ_HANDLED;
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+}
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+
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+struct irqaction gic_compare_irqaction = {
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+ .handler = gic_compare_interrupt,
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+ .flags = IRQF_PERCPU | IRQF_TIMER,
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+ .name = "timer",
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+};
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+
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+void gic_event_handler(struct clock_event_device *dev)
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+{
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+}
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+
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+int gic_clockevent_init(void)
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+{
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+ unsigned int cpu = smp_processor_id();
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+ struct clock_event_device *cd;
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+ unsigned int irq;
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+
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+ if (!cpu_has_counter || !gic_frequency)
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+ return -ENXIO;
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+
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+ irq = MIPS_GIC_IRQ_BASE + GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_COMPARE);
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+
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+ cd = &per_cpu(gic_clockevent_device, cpu);
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+
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+ cd->name = "MIPS GIC";
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+ cd->features = CLOCK_EVT_FEAT_ONESHOT |
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+ CLOCK_EVT_FEAT_C3STOP;
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+
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+ clockevent_set_clock(cd, gic_frequency);
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+
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+ /* Calculate the min / max delta */
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+ cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
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+ cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
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+
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+ cd->rating = 300;
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+ cd->irq = irq;
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+ cd->cpumask = cpumask_of(cpu);
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+ cd->set_next_event = gic_next_event;
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+ cd->set_mode = gic_set_clock_mode;
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+ cd->event_handler = gic_event_handler;
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+
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+ clockevents_register_device(cd);
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+
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+ if (!gic_timer_irq_installed) {
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+ setup_percpu_irq(irq, &gic_compare_irqaction);
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+ gic_timer_irq_installed = 1;
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+ }
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+
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+ enable_percpu_irq(irq, IRQ_TYPE_NONE);
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+
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+ return 0;
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+}
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+
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static cycle_t gic_hpt_read(struct clocksource *cs)
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static cycle_t gic_hpt_read(struct clocksource *cs)
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{
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{
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return gic_read_count();
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return gic_read_count();
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