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@@ -271,7 +271,6 @@
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#define DMA_PBL_X8_DISABLE 0x00
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#define DMA_PBL_X8_ENABLE 0x01
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-
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/* MAC register offsets */
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#define MAC_TCR 0x0000
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#define MAC_RCR 0x0004
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@@ -792,7 +791,6 @@
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#define MTL_Q_DISABLED 0x00
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#define MTL_Q_ENABLED 0x02
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-
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/* MTL traffic class register offsets
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* Multiple traffic classes can be active. The first class has registers
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* that begin at 0x1100. Each subsequent queue has registers that
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@@ -815,7 +813,6 @@
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#define MTL_TSA_SP 0x00
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#define MTL_TSA_ETS 0x02
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-
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/* PCS MMD select register offset
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* The MMD select register is used for accessing PCS registers
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* when the underlying APB3 interface is using indirect addressing.
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@@ -825,7 +822,6 @@
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*/
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#define PCS_MMD_SELECT 0xff
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-
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/* Descriptor/Packet entry bit positions and sizes */
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#define RX_PACKET_ERRORS_CRC_INDEX 2
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#define RX_PACKET_ERRORS_CRC_WIDTH 1
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@@ -929,7 +925,6 @@
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#define MDIO_AN_COMP_STAT 0x0030
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#endif
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-
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/* Bit setting and getting macros
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* The get macro will extract the current bit field value from within
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* the variable
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@@ -957,7 +952,6 @@ do { \
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((0x1 << (_width)) - 1)) << (_index))); \
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} while (0)
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-
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/* Bit setting and getting macros based on register fields
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* The get macro uses the bit field definitions formed using the input
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* names to extract the current bit field value from within the
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@@ -986,7 +980,6 @@ do { \
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_prefix##_##_field##_INDEX, \
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_prefix##_##_field##_WIDTH, (_val))
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-
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/* Macros for reading or writing registers
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* The ioread macros will get bit fields or full values using the
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* register definitions formed using the input names
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@@ -1014,7 +1007,6 @@ do { \
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XGMAC_IOWRITE((_pdata), _reg, reg_val); \
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} while (0)
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-
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/* Macros for reading or writing MTL queue or traffic class registers
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* Similar to the standard read and write macros except that the
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* base register value is calculated by the queue or traffic class number
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@@ -1041,7 +1033,6 @@ do { \
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XGMAC_MTL_IOWRITE((_pdata), (_n), _reg, reg_val); \
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} while (0)
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-
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/* Macros for reading or writing DMA channel registers
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* Similar to the standard read and write macros except that the
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* base register value is obtained from the ring
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@@ -1066,7 +1057,6 @@ do { \
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XGMAC_DMA_IOWRITE((_channel), _reg, reg_val); \
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} while (0)
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-
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/* Macros for building, reading or writing register values or bits
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* within the register values of XPCS registers.
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*/
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@@ -1076,7 +1066,6 @@ do { \
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#define XPCS_IOREAD(_pdata, _off) \
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ioread32((_pdata)->xpcs_regs + (_off))
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-
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/* Macros for building, reading or writing register values or bits
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* using MDIO. Different from above because of the use of standardized
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* Linux include values. No shifting is performed with the bit
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