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@@ -178,14 +178,25 @@ void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
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* process in case of 64-bit doorbells so we
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* process in case of 64-bit doorbells so we
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* can use each doorbell assignment twice.
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* can use each doorbell assignment twice.
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*/
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*/
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- gpu_resources.sdma_doorbell[0][i] =
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- AMDGPU_DOORBELL64_sDMA_ENGINE0 + (i >> 1);
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- gpu_resources.sdma_doorbell[0][i+1] =
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- AMDGPU_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1);
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- gpu_resources.sdma_doorbell[1][i] =
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- AMDGPU_DOORBELL64_sDMA_ENGINE1 + (i >> 1);
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- gpu_resources.sdma_doorbell[1][i+1] =
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- AMDGPU_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1);
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+ if (adev->asic_type == CHIP_VEGA10) {
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+ gpu_resources.sdma_doorbell[0][i] =
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+ AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + (i >> 1);
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+ gpu_resources.sdma_doorbell[0][i+1] =
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+ AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1);
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+ gpu_resources.sdma_doorbell[1][i] =
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+ AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + (i >> 1);
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+ gpu_resources.sdma_doorbell[1][i+1] =
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+ AMDGPU_VEGA10_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1);
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+ } else {
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+ gpu_resources.sdma_doorbell[0][i] =
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+ AMDGPU_DOORBELL64_sDMA_ENGINE0 + (i >> 1);
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+ gpu_resources.sdma_doorbell[0][i+1] =
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+ AMDGPU_DOORBELL64_sDMA_ENGINE0 + 0x200 + (i >> 1);
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+ gpu_resources.sdma_doorbell[1][i] =
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+ AMDGPU_DOORBELL64_sDMA_ENGINE1 + (i >> 1);
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+ gpu_resources.sdma_doorbell[1][i+1] =
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+ AMDGPU_DOORBELL64_sDMA_ENGINE1 + 0x200 + (i >> 1);
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+ }
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}
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}
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/* Doorbells 0x0e0-0ff and 0x2e0-2ff are reserved for
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/* Doorbells 0x0e0-0ff and 0x2e0-2ff are reserved for
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* SDMA, IH and VCN. So don't use them for the CP.
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* SDMA, IH and VCN. So don't use them for the CP.
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