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@@ -27,6 +27,9 @@
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#include "atom.h"
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#include "atom.h"
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#include "amdgpu_pll.h"
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#include "amdgpu_pll.h"
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#include "amdgpu_connectors.h"
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#include "amdgpu_connectors.h"
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+#ifdef CONFIG_DRM_AMDGPU_SI
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+#include "dce_v6_0.h"
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+#endif
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#ifdef CONFIG_DRM_AMDGPU_CIK
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#ifdef CONFIG_DRM_AMDGPU_CIK
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#include "dce_v8_0.h"
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#include "dce_v8_0.h"
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#endif
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#endif
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@@ -99,6 +102,14 @@ static void dce_virtual_stop_mc_access(struct amdgpu_device *adev,
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struct amdgpu_mode_mc_save *save)
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struct amdgpu_mode_mc_save *save)
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{
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{
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switch (adev->asic_type) {
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switch (adev->asic_type) {
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+#ifdef CONFIG_DRM_AMDGPU_SI
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+ case CHIP_TAHITI:
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+ case CHIP_PITCAIRN:
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+ case CHIP_VERDE:
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+ case CHIP_OLAND:
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+ dce_v6_0_disable_dce(adev);
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+ break;
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+#endif
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#ifdef CONFIG_DRM_AMDGPU_CIK
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#ifdef CONFIG_DRM_AMDGPU_CIK
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case CHIP_BONAIRE:
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case CHIP_BONAIRE:
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case CHIP_HAWAII:
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case CHIP_HAWAII:
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@@ -119,6 +130,9 @@ static void dce_virtual_stop_mc_access(struct amdgpu_device *adev,
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dce_v11_0_disable_dce(adev);
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dce_v11_0_disable_dce(adev);
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break;
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break;
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case CHIP_TOPAZ:
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case CHIP_TOPAZ:
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+#ifdef CONFIG_DRM_AMDGPU_SI
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+ case CHIP_HAINAN:
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+#endif
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/* no DCE */
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/* no DCE */
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return;
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return;
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default:
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default:
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