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@@ -23,23 +23,21 @@
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#define TEGRA_SWGROUP_EMUCIF 18
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#define TEGRA_SWGROUP_TSEC 19
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-#define TEGRA114_MC_RESET_AFI 0
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-#define TEGRA114_MC_RESET_AVPC 1
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-#define TEGRA114_MC_RESET_DC 2
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-#define TEGRA114_MC_RESET_DCB 3
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-#define TEGRA114_MC_RESET_EPP 4
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-#define TEGRA114_MC_RESET_2D 5
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-#define TEGRA114_MC_RESET_HC 6
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-#define TEGRA114_MC_RESET_HDA 7
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-#define TEGRA114_MC_RESET_ISP 8
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-#define TEGRA114_MC_RESET_MPCORE 9
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-#define TEGRA114_MC_RESET_MPCORELP 10
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-#define TEGRA114_MC_RESET_MPE 11
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-#define TEGRA114_MC_RESET_3D 12
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-#define TEGRA114_MC_RESET_3D2 13
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-#define TEGRA114_MC_RESET_PPCS 14
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-#define TEGRA114_MC_RESET_SATA 15
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-#define TEGRA114_MC_RESET_VDE 16
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-#define TEGRA114_MC_RESET_VI 17
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+#define TEGRA114_MC_RESET_AVPC 0
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+#define TEGRA114_MC_RESET_DC 1
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+#define TEGRA114_MC_RESET_DCB 2
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+#define TEGRA114_MC_RESET_EPP 3
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+#define TEGRA114_MC_RESET_2D 4
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+#define TEGRA114_MC_RESET_HC 5
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+#define TEGRA114_MC_RESET_HDA 6
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+#define TEGRA114_MC_RESET_ISP 7
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+#define TEGRA114_MC_RESET_MPCORE 8
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+#define TEGRA114_MC_RESET_MPCORELP 9
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+#define TEGRA114_MC_RESET_MPE 10
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+#define TEGRA114_MC_RESET_3D 11
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+#define TEGRA114_MC_RESET_3D2 12
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+#define TEGRA114_MC_RESET_PPCS 13
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+#define TEGRA114_MC_RESET_VDE 14
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+#define TEGRA114_MC_RESET_VI 15
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#endif
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