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@@ -132,26 +132,6 @@ enum access_mode {
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USE_WORD_ACCESS,
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};
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-/**
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- * fsmc_nand_platform_data - platform specific NAND controller config
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- * @nand_timings: timing setup for the physical NAND interface
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- * @partitions: partition table for the platform, use a default fallback
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- * if this is NULL
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- * @nr_partitions: the number of partitions in the previous entry
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- * @options: different options for the driver
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- * @width: bus width
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- * @bank: default bank
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- * platform-specific. If the controller only supports one bank
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- * this may be set to NULL
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- */
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-struct fsmc_nand_platform_data {
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- struct fsmc_nand_timings *nand_timings;
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- unsigned int options;
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- unsigned int bank;
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-
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- enum access_mode mode;
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-};
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-
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/**
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* struct fsmc_nand_data - structure for FSMC NAND device state
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*
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@@ -798,17 +778,18 @@ static bool filter(struct dma_chan *chan, void *slave)
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}
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static int fsmc_nand_probe_config_dt(struct platform_device *pdev,
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- struct device_node *np)
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+ struct fsmc_nand_data *host,
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+ struct nand_chip *nand)
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{
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- struct fsmc_nand_platform_data *pdata = dev_get_platdata(&pdev->dev);
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+ struct device_node *np = pdev->dev.of_node;
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u32 val;
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int ret;
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- pdata->options = 0;
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+ nand->options = 0;
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if (!of_property_read_u32(np, "bank-width", &val)) {
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if (val == 2) {
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- pdata->options |= NAND_BUSWIDTH_16;
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+ nand->options |= NAND_BUSWIDTH_16;
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} else if (val != 1) {
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dev_err(&pdev->dev, "invalid bank-width %u\n", val);
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return -EINVAL;
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@@ -816,27 +797,27 @@ static int fsmc_nand_probe_config_dt(struct platform_device *pdev,
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}
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if (of_get_property(np, "nand-skip-bbtscan", NULL))
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- pdata->options |= NAND_SKIP_BBTSCAN;
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+ nand->options |= NAND_SKIP_BBTSCAN;
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- pdata->nand_timings = devm_kzalloc(&pdev->dev,
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- sizeof(*pdata->nand_timings), GFP_KERNEL);
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- if (!pdata->nand_timings)
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+ host->dev_timings = devm_kzalloc(&pdev->dev,
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+ sizeof(*host->dev_timings), GFP_KERNEL);
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+ if (!host->dev_timings)
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return -ENOMEM;
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- ret = of_property_read_u8_array(np, "timings", (u8 *)pdata->nand_timings,
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- sizeof(*pdata->nand_timings));
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+ ret = of_property_read_u8_array(np, "timings", (u8 *)host->dev_timings,
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+ sizeof(*host->dev_timings));
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if (ret) {
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dev_info(&pdev->dev, "No timings in dts specified, using default timings!\n");
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- pdata->nand_timings = NULL;
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+ host->dev_timings = NULL;
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}
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/* Set default NAND bank to 0 */
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- pdata->bank = 0;
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+ host->bank = 0;
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if (!of_property_read_u32(np, "bank", &val)) {
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if (val > 3) {
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dev_err(&pdev->dev, "invalid bank %u\n", val);
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return -EINVAL;
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}
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- pdata->bank = val;
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+ host->bank = val;
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}
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return 0;
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}
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@@ -847,8 +828,6 @@ static int fsmc_nand_probe_config_dt(struct platform_device *pdev,
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*/
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static int __init fsmc_nand_probe(struct platform_device *pdev)
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{
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- struct fsmc_nand_platform_data *pdata = dev_get_platdata(&pdev->dev);
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- struct device_node __maybe_unused *np = pdev->dev.of_node;
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struct fsmc_nand_data *host;
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struct mtd_info *mtd;
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struct nand_chip *nand;
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@@ -858,22 +837,17 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
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u32 pid;
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int i;
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- pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
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- if (!pdata)
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- return -ENOMEM;
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-
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- pdev->dev.platform_data = pdata;
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- ret = fsmc_nand_probe_config_dt(pdev, np);
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- if (ret) {
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- dev_err(&pdev->dev, "no platform data\n");
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- return -ENODEV;
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- }
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-
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/* Allocate memory for the device structure (and zero it) */
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host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL);
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if (!host)
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return -ENOMEM;
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+ nand = &host->nand;
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+
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+ ret = fsmc_nand_probe_config_dt(pdev, host, nand);
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+ if (ret)
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+ return ret;
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+
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_data");
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host->data_va = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(host->data_va))
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@@ -918,19 +892,15 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
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AMBA_PART_BITS(pid), AMBA_MANF_BITS(pid),
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AMBA_REV_BITS(pid), AMBA_CONFIG_BITS(pid));
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- host->bank = pdata->bank;
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host->dev = &pdev->dev;
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- host->dev_timings = pdata->nand_timings;
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- host->mode = pdata->mode;
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if (host->mode == USE_DMA_ACCESS)
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init_completion(&host->dma_access_complete);
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/* Link all private pointers */
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mtd = nand_to_mtd(&host->nand);
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- nand = &host->nand;
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nand_set_controller_data(nand, host);
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- nand_set_flash_node(nand, np);
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+ nand_set_flash_node(nand, pdev->dev.of_node);
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mtd->dev.parent = &pdev->dev;
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nand->IO_ADDR_R = host->data_va;
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@@ -945,7 +915,6 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
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nand->ecc.mode = NAND_ECC_HW;
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nand->ecc.hwctl = fsmc_enable_hwecc;
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nand->ecc.size = 512;
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- nand->options = pdata->options;
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nand->badblockbits = 7;
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switch (host->mode) {
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