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+/*
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+ * Ptrace test for VMX/VSX registers in the TM Suspend context
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+ *
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+ * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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+ * as published by the Free Software Foundation; either version
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+ * 2 of the License, or (at your option) any later version.
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+ */
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+#include "ptrace.h"
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+#include "tm.h"
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+#include "ptrace-vsx.h"
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+
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+int shm_id;
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+int *cptr, *pptr;
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+
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+unsigned long fp_load[VEC_MAX];
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+unsigned long fp_load_new[VEC_MAX];
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+unsigned long fp_store[VEC_MAX];
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+unsigned long fp_load_ckpt[VEC_MAX];
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+unsigned long fp_load_ckpt_new[VEC_MAX];
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+
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+__attribute__((used)) void load_vsx(void)
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+{
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+ loadvsx(fp_load, 0);
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+}
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+
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+__attribute__((used)) void load_vsx_new(void)
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+{
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+ loadvsx(fp_load_new, 0);
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+}
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+
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+__attribute__((used)) void load_vsx_ckpt(void)
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+{
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+ loadvsx(fp_load_ckpt, 0);
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+}
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+
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+__attribute__((used)) void wait_parent(void)
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+{
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+ cptr[2] = 1;
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+ while (!cptr[1])
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+ asm volatile("" : : : "memory");
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+}
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+
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+void tm_spd_vsx(void)
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+{
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+ unsigned long result, texasr;
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+ int ret;
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+
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+ cptr = (int *)shmat(shm_id, NULL, 0);
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+
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+trans:
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+ cptr[2] = 0;
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+ asm __volatile__(
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+ "bl load_vsx_ckpt;"
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+
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+ "1: ;"
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+ "tbegin.;"
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+ "beq 2f;"
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+
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+ "bl load_vsx_new;"
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+ "tsuspend.;"
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+ "bl load_vsx;"
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+ "bl wait_parent;"
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+ "tresume.;"
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+
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+ "tend.;"
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+ "li 0, 0;"
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+ "ori %[res], 0, 0;"
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+ "b 3f;"
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+
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+ "2: ;"
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+ "li 0, 1;"
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+ "ori %[res], 0, 0;"
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+ "mfspr %[texasr], %[sprn_texasr];"
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+
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+ "3: ;"
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+ : [res] "=r" (result), [texasr] "=r" (texasr)
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+ : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
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+ [sprn_texasr] "i" (SPRN_TEXASR)
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+ : "memory", "r0", "r1", "r2", "r3", "r4",
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+ "r8", "r9", "r10", "r11"
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+ );
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+
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+ if (result) {
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+ if (!cptr[0])
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+ goto trans;
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+ shmdt((void *)cptr);
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+
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+ storevsx(fp_store, 0);
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+ ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
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+ if (ret)
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+ exit(1);
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+ exit(0);
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+ }
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+ shmdt((void *)cptr);
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+ exit(1);
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+}
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+
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+int trace_tm_spd_vsx(pid_t child)
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+{
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+ unsigned long vsx[VSX_MAX];
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+ unsigned long vmx[VMX_MAX + 2][2];
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+
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+ FAIL_IF(start_trace(child));
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+ FAIL_IF(show_vsx(child, vsx));
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+ FAIL_IF(validate_vsx(vsx, fp_load));
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+ FAIL_IF(show_vmx(child, vmx));
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+ FAIL_IF(validate_vmx(vmx, fp_load));
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+ FAIL_IF(show_vsx_ckpt(child, vsx));
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+ FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
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+ FAIL_IF(show_vmx_ckpt(child, vmx));
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+ FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
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+
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+ memset(vsx, 0, sizeof(vsx));
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+ memset(vmx, 0, sizeof(vmx));
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+
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+ load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
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+
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+ FAIL_IF(write_vsx_ckpt(child, vsx));
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+ FAIL_IF(write_vmx_ckpt(child, vmx));
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+
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+ pptr[0] = 1;
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+ pptr[1] = 1;
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+ FAIL_IF(stop_trace(child));
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+
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+ return TEST_PASS;
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+}
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+
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+int ptrace_tm_spd_vsx(void)
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+{
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+ pid_t pid;
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+ int ret, status, i;
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+
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+ SKIP_IF(!have_htm());
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+ shm_id = shmget(IPC_PRIVATE, sizeof(int) * 3, 0777|IPC_CREAT);
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+
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+ for (i = 0; i < 128; i++) {
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+ fp_load[i] = 1 + rand();
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+ fp_load_new[i] = 1 + 2 * rand();
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+ fp_load_ckpt[i] = 1 + 3 * rand();
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+ fp_load_ckpt_new[i] = 1 + 4 * rand();
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+ }
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+
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+ pid = fork();
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+ if (pid < 0) {
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+ perror("fork() failed");
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+ return TEST_FAIL;
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+ }
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+
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+ if (pid == 0)
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+ tm_spd_vsx();
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+
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+ if (pid) {
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+ pptr = (int *)shmat(shm_id, NULL, 0);
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+ while (!pptr[2])
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+ asm volatile("" : : : "memory");
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+
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+ ret = trace_tm_spd_vsx(pid);
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+ if (ret) {
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+ kill(pid, SIGKILL);
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+ shmdt((void *)pptr);
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+ shmctl(shm_id, IPC_RMID, NULL);
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+ return TEST_FAIL;
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+ }
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+
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+ shmdt((void *)pptr);
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+ ret = wait(&status);
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+ shmctl(shm_id, IPC_RMID, NULL);
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+ if (ret != pid) {
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+ printf("Child's exit status not captured\n");
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+ return TEST_FAIL;
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+ }
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+
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+ return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
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+ TEST_PASS;
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+ }
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+ return TEST_PASS;
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+}
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+
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+int main(int argc, char *argv[])
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+{
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+ return test_harness(ptrace_tm_spd_vsx, "ptrace_tm_spd_vsx");
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+}
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