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@@ -37,6 +37,32 @@ static inline void vsp1_bru_write(struct vsp1_bru *bru, u32 reg, u32 data)
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vsp1_write(bru->entity.vsp1, reg, data);
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vsp1_write(bru->entity.vsp1, reg, data);
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}
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}
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+/* -----------------------------------------------------------------------------
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+ * Controls
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+ */
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+
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+static int bru_s_ctrl(struct v4l2_ctrl *ctrl)
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+{
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+ struct vsp1_bru *bru =
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+ container_of(ctrl->handler, struct vsp1_bru, ctrls);
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+
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+ if (!vsp1_entity_is_streaming(&bru->entity))
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+ return 0;
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+
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+ switch (ctrl->id) {
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+ case V4L2_CID_BG_COLOR:
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+ vsp1_bru_write(bru, VI6_BRU_VIRRPF_COL, ctrl->val |
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+ (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT));
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+ break;
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+ }
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+
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+ return 0;
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+}
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+
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+static const struct v4l2_ctrl_ops bru_ctrl_ops = {
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+ .s_ctrl = bru_s_ctrl,
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+};
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+
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/* -----------------------------------------------------------------------------
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/* -----------------------------------------------------------------------------
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* V4L2 Subdevice Core Operations
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* V4L2 Subdevice Core Operations
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*/
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*/
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@@ -48,6 +74,11 @@ static int bru_s_stream(struct v4l2_subdev *subdev, int enable)
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struct v4l2_mbus_framefmt *format;
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struct v4l2_mbus_framefmt *format;
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unsigned int flags;
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unsigned int flags;
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unsigned int i;
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unsigned int i;
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+ int ret;
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+
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+ ret = vsp1_entity_set_streaming(&bru->entity, enable);
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+ if (ret < 0)
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+ return ret;
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if (!enable)
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if (!enable)
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return 0;
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return 0;
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@@ -68,15 +99,11 @@ static int bru_s_stream(struct v4l2_subdev *subdev, int enable)
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flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?
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flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?
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0 : VI6_BRU_INCTRL_NRM);
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0 : VI6_BRU_INCTRL_NRM);
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- /* Set the background position to cover the whole output image and
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- * set its color to opaque black.
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- */
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+ /* Set the background position to cover the whole output image. */
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vsp1_bru_write(bru, VI6_BRU_VIRRPF_SIZE,
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vsp1_bru_write(bru, VI6_BRU_VIRRPF_SIZE,
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(format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
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(format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
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(format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
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(format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
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vsp1_bru_write(bru, VI6_BRU_VIRRPF_LOC, 0);
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vsp1_bru_write(bru, VI6_BRU_VIRRPF_LOC, 0);
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- vsp1_bru_write(bru, VI6_BRU_VIRRPF_COL,
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- 0xff << VI6_BRU_VIRRPF_COL_A_SHIFT);
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/* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
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/* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
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* unit with a NOP operation to make BRU input 1 available as the
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* unit with a NOP operation to make BRU input 1 available as the
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@@ -407,5 +434,19 @@ struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1)
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vsp1_entity_init_formats(subdev, NULL);
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vsp1_entity_init_formats(subdev, NULL);
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+ /* Initialize the control handler. */
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+ v4l2_ctrl_handler_init(&bru->ctrls, 1);
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+ v4l2_ctrl_new_std(&bru->ctrls, &bru_ctrl_ops, V4L2_CID_BG_COLOR,
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+ 0, 0xffffff, 1, 0);
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+
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+ bru->entity.subdev.ctrl_handler = &bru->ctrls;
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+
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+ if (bru->ctrls.error) {
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+ dev_err(vsp1->dev, "bru: failed to initialize controls\n");
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+ ret = bru->ctrls.error;
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+ vsp1_entity_destroy(&bru->entity);
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+ return ERR_PTR(ret);
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+ }
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+
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return bru;
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return bru;
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}
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}
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