Allwinner V3s SoC also features the dual route of the first USB PHY. Enable it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
@@ -926,6 +926,7 @@ static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
.phyctl_offset = REG_PHYCTL_A33,
.dedicated_clocks = true,
.enable_pmu_unk1 = true,
+ .phy0_dual_route = true,
};
static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {