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@@ -98,7 +98,7 @@ enum {
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#define OMAP_I2C_STAT_ROVR (1 << 11) /* Receive overrun */
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#define OMAP_I2C_STAT_ROVR (1 << 11) /* Receive overrun */
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#define OMAP_I2C_STAT_XUDF (1 << 10) /* Transmit underflow */
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#define OMAP_I2C_STAT_XUDF (1 << 10) /* Transmit underflow */
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#define OMAP_I2C_STAT_AAS (1 << 9) /* Address as slave */
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#define OMAP_I2C_STAT_AAS (1 << 9) /* Address as slave */
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-#define OMAP_I2C_STAT_AD0 (1 << 8) /* Address zero */
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+#define OMAP_I2C_STAT_BF (1 << 8) /* Bus Free */
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#define OMAP_I2C_STAT_XRDY (1 << 4) /* Transmit data ready */
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#define OMAP_I2C_STAT_XRDY (1 << 4) /* Transmit data ready */
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#define OMAP_I2C_STAT_RRDY (1 << 3) /* Receive data ready */
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#define OMAP_I2C_STAT_RRDY (1 << 3) /* Receive data ready */
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#define OMAP_I2C_STAT_ARDY (1 << 2) /* Register access ready */
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#define OMAP_I2C_STAT_ARDY (1 << 2) /* Register access ready */
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@@ -146,16 +146,20 @@ enum {
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#define OMAP_I2C_SCLH_HSSCLH 8
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#define OMAP_I2C_SCLH_HSSCLH 8
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/* I2C System Test Register (OMAP_I2C_SYSTEST): */
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/* I2C System Test Register (OMAP_I2C_SYSTEST): */
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-#ifdef DEBUG
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#define OMAP_I2C_SYSTEST_ST_EN (1 << 15) /* System test enable */
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#define OMAP_I2C_SYSTEST_ST_EN (1 << 15) /* System test enable */
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#define OMAP_I2C_SYSTEST_FREE (1 << 14) /* Free running mode */
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#define OMAP_I2C_SYSTEST_FREE (1 << 14) /* Free running mode */
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#define OMAP_I2C_SYSTEST_TMODE_MASK (3 << 12) /* Test mode select */
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#define OMAP_I2C_SYSTEST_TMODE_MASK (3 << 12) /* Test mode select */
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#define OMAP_I2C_SYSTEST_TMODE_SHIFT (12) /* Test mode select */
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#define OMAP_I2C_SYSTEST_TMODE_SHIFT (12) /* Test mode select */
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+/* Functional mode */
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+#define OMAP_I2C_SYSTEST_SCL_I_FUNC (1 << 8) /* SCL line input value */
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+#define OMAP_I2C_SYSTEST_SCL_O_FUNC (1 << 7) /* SCL line output value */
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+#define OMAP_I2C_SYSTEST_SDA_I_FUNC (1 << 6) /* SDA line input value */
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+#define OMAP_I2C_SYSTEST_SDA_O_FUNC (1 << 5) /* SDA line output value */
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+/* SDA/SCL IO mode */
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#define OMAP_I2C_SYSTEST_SCL_I (1 << 3) /* SCL line sense in */
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#define OMAP_I2C_SYSTEST_SCL_I (1 << 3) /* SCL line sense in */
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#define OMAP_I2C_SYSTEST_SCL_O (1 << 2) /* SCL line drive out */
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#define OMAP_I2C_SYSTEST_SCL_O (1 << 2) /* SCL line drive out */
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#define OMAP_I2C_SYSTEST_SDA_I (1 << 1) /* SDA line sense in */
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#define OMAP_I2C_SYSTEST_SDA_I (1 << 1) /* SDA line sense in */
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#define OMAP_I2C_SYSTEST_SDA_O (1 << 0) /* SDA line drive out */
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#define OMAP_I2C_SYSTEST_SDA_O (1 << 0) /* SDA line drive out */
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-#endif
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/* OCP_SYSSTATUS bit definitions */
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/* OCP_SYSSTATUS bit definitions */
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#define SYSS_RESETDONE_MASK (1 << 0)
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#define SYSS_RESETDONE_MASK (1 << 0)
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