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@@ -17,6 +17,7 @@
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#include <asm/cputype.h>
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#include <asm/smp_plat.h>
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+#include <asm/tlbflush.h>
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/* Macros for consistency checks of the GICC subtable of MADT */
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#define ACPI_MADT_GICC_LENGTH \
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@@ -114,8 +115,28 @@ static inline const char *acpi_get_enable_method(int cpu)
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}
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#ifdef CONFIG_ACPI_APEI
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+/*
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+ * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
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+ * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
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+ * with a kernel command line parameter "acpi=nocmcoff". But we don't
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+ * have this IA-32 specific feature on ARM64, this definition is only
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+ * for compatibility.
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+ */
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+#define acpi_disable_cmcff 1
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pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
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-#endif
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+
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+/*
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+ * Despite its name, this function must still broadcast the TLB
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+ * invalidation in order to ensure other CPUs don't end up with junk
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+ * entries as a result of speculation. Unusually, its also called in
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+ * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
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+ * TLB broadcasting, then we're in trouble here.
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+ */
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+static inline void arch_apei_flush_tlb_one(unsigned long addr)
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+{
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+ flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
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+}
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+#endif /* CONFIG_ACPI_APEI */
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#ifdef CONFIG_ACPI_NUMA
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int arm64_acpi_numa_init(void);
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