|
@@ -111,7 +111,6 @@ static struct ioapic {
|
|
|
struct ioapic_domain_cfg irqdomain_cfg;
|
|
|
struct irq_domain *irqdomain;
|
|
|
struct mp_pin_info *pin_info;
|
|
|
- DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
|
|
|
} ioapics[MAX_IO_APICS];
|
|
|
|
|
|
#define mpc_ioapic_ver(ioapic_idx) ioapics[ioapic_idx].mp_config.apicver
|
|
@@ -1523,38 +1522,6 @@ static void __init setup_IO_APIC_irqs(void)
|
|
|
__io_apic_setup_irqs(ioapic_idx);
|
|
|
}
|
|
|
|
|
|
-/*
|
|
|
- * for the gsi that is not in first ioapic
|
|
|
- * but could not use acpi_register_gsi()
|
|
|
- * like some special sci in IBM x3330
|
|
|
- */
|
|
|
-void setup_IO_APIC_irq_extra(u32 gsi)
|
|
|
-{
|
|
|
- int ioapic_idx = 0, pin, idx, irq, node = cpu_to_node(0);
|
|
|
- struct io_apic_irq_attr attr;
|
|
|
-
|
|
|
- /*
|
|
|
- * Convert 'gsi' to 'ioapic.pin'.
|
|
|
- */
|
|
|
- ioapic_idx = mp_find_ioapic(gsi);
|
|
|
- if (ioapic_idx < 0)
|
|
|
- return;
|
|
|
-
|
|
|
- pin = mp_find_ioapic_pin(ioapic_idx, gsi);
|
|
|
- idx = find_irq_entry(ioapic_idx, pin, mp_INT);
|
|
|
- if (idx == -1)
|
|
|
- return;
|
|
|
-
|
|
|
- irq = pin_2_irq(idx, ioapic_idx, pin, IOAPIC_MAP_ALLOC);
|
|
|
- if (irq < 0 || mp_init_irq_at_boot(ioapic_idx, irq))
|
|
|
- return;
|
|
|
-
|
|
|
- set_io_apic_irq_attr(&attr, ioapic_idx, pin, irq_trigger(idx),
|
|
|
- irq_polarity(idx));
|
|
|
-
|
|
|
- io_apic_setup_irq_pin_once(irq, node, &attr);
|
|
|
-}
|
|
|
-
|
|
|
/*
|
|
|
* Set up the timer pin, possibly with the 8259A-master behind.
|
|
|
*/
|
|
@@ -3458,27 +3425,6 @@ io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr)
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
|
-int io_apic_setup_irq_pin_once(unsigned int irq, int node,
|
|
|
- struct io_apic_irq_attr *attr)
|
|
|
-{
|
|
|
- unsigned int ioapic_idx = attr->ioapic, pin = attr->ioapic_pin;
|
|
|
- int ret;
|
|
|
- struct IO_APIC_route_entry orig_entry;
|
|
|
-
|
|
|
- /* Avoid redundant programming */
|
|
|
- if (test_bit(pin, ioapics[ioapic_idx].pin_programmed)) {
|
|
|
- pr_debug("Pin %d-%d already programmed\n", mpc_ioapic_id(ioapic_idx), pin);
|
|
|
- orig_entry = ioapic_read_entry(attr->ioapic, pin);
|
|
|
- if (attr->trigger == orig_entry.trigger && attr->polarity == orig_entry.polarity)
|
|
|
- return 0;
|
|
|
- return -EBUSY;
|
|
|
- }
|
|
|
- ret = io_apic_setup_irq_pin(irq, node, attr);
|
|
|
- if (!ret)
|
|
|
- set_bit(pin, ioapics[ioapic_idx].pin_programmed);
|
|
|
- return ret;
|
|
|
-}
|
|
|
-
|
|
|
static int __init io_apic_get_redir_entries(int ioapic)
|
|
|
{
|
|
|
union IO_APIC_reg_01 reg_01;
|
|
@@ -3525,22 +3471,6 @@ int __init arch_probe_nr_irqs(void)
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
-int io_apic_set_pci_routing(struct device *dev, int irq,
|
|
|
- struct io_apic_irq_attr *irq_attr)
|
|
|
-{
|
|
|
- int node;
|
|
|
-
|
|
|
- if (!IO_APIC_IRQ(irq)) {
|
|
|
- apic_printk(APIC_QUIET,KERN_ERR "IOAPIC[%d]: Invalid reference to IRQ 0\n",
|
|
|
- irq_attr->ioapic);
|
|
|
- return -EINVAL;
|
|
|
- }
|
|
|
-
|
|
|
- node = dev ? dev_to_node(dev) : cpu_to_node(0);
|
|
|
-
|
|
|
- return io_apic_setup_irq_pin_once(irq, node, irq_attr);
|
|
|
-}
|
|
|
-
|
|
|
#ifdef CONFIG_X86_32
|
|
|
static int __init io_apic_get_unique_id(int ioapic, int apic_id)
|
|
|
{
|