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@@ -2961,7 +2961,13 @@ static int gfx_v9_0_hw_fini(void *handle)
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gfx_v9_0_kcq_disable(&adev->gfx.kiq.ring, &adev->gfx.compute_ring[i]);
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if (amdgpu_sriov_vf(adev)) {
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- pr_debug("For SRIOV client, shouldn't do anything.\n");
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+ gfx_v9_0_cp_gfx_enable(adev, false);
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+ /* must disable polling for SRIOV when hw finished, otherwise
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+ * CPC engine may still keep fetching WB address which is already
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+ * invalid after sw finished and trigger DMAR reading error in
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+ * hypervisor side.
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+ */
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+ WREG32_FIELD15(GC, 0, CP_PQ_WPTR_POLL_CNTL, EN, 0);
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return 0;
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}
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gfx_v9_0_cp_enable(adev, false);
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