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@@ -175,6 +175,37 @@
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clocks = <&clk_hse>;
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};
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+ dma1: dma-controller@40026000 {
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+ compatible = "st,stm32-dma";
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+ reg = <0x40026000 0x400>;
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+ interrupts = <11>,
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+ <12>,
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+ <13>,
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+ <14>,
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+ <15>,
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+ <16>,
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+ <17>,
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+ <47>;
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+ clocks = <&rcc 0 21>;
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+ #dma-cells = <4>;
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+ };
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+
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+ dma2: dma-controller@40026400 {
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+ compatible = "st,stm32-dma";
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+ reg = <0x40026400 0x400>;
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+ interrupts = <56>,
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+ <57>,
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+ <58>,
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+ <59>,
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+ <60>,
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+ <68>,
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+ <69>,
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+ <70>;
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+ clocks = <&rcc 0 22>;
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+ #dma-cells = <4>;
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+ st,mem2mem;
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+ };
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+
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rng: rng@50060800 {
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compatible = "st,stm32-rng";
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reg = <0x50060800 0x400>;
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