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@@ -6618,8 +6618,22 @@ static void gfx_v8_0_ring_emit_rreg(struct amdgpu_ring *ring, uint32_t reg)
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static void gfx_v8_0_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg,
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uint32_t val)
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{
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+ uint32_t cmd;
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+
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+ switch (ring->funcs->type) {
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+ case AMDGPU_RING_TYPE_GFX:
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+ cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM;
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+ break;
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+ case AMDGPU_RING_TYPE_KIQ:
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+ cmd = 1 << 16; /* no inc addr */
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+ break;
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+ default:
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+ cmd = WR_CONFIRM;
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+ break;
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+ }
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+
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amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
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- amdgpu_ring_write(ring, (1 << 16)); /* no inc addr */
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+ amdgpu_ring_write(ring, cmd);
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amdgpu_ring_write(ring, reg);
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amdgpu_ring_write(ring, 0);
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amdgpu_ring_write(ring, val);
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@@ -6903,6 +6917,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_gfx = {
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.emit_cntxcntl = gfx_v8_ring_emit_cntxcntl,
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.init_cond_exec = gfx_v8_0_ring_emit_init_cond_exec,
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.patch_cond_exec = gfx_v8_0_ring_emit_patch_cond_exec,
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+ .emit_wreg = gfx_v8_0_ring_emit_wreg,
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};
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static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = {
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@@ -6933,6 +6948,7 @@ static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_compute = {
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.insert_nop = amdgpu_ring_insert_nop,
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.pad_ib = amdgpu_ring_generic_pad_ib,
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.set_priority = gfx_v8_0_ring_set_priority_compute,
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+ .emit_wreg = gfx_v8_0_ring_emit_wreg,
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};
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static const struct amdgpu_ring_funcs gfx_v8_0_ring_funcs_kiq = {
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