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@@ -5288,6 +5288,38 @@ u32 pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed,
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return *width * PCIE_SPEED2MBS_ENC(*speed);
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}
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+/**
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+ * pcie_print_link_status - Report the PCI device's link speed and width
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+ * @dev: PCI device to query
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+ *
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+ * Report the available bandwidth at the device. If this is less than the
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+ * device is capable of, report the device's maximum possible bandwidth and
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+ * the upstream link that limits its performance to less than that.
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+ */
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+void pcie_print_link_status(struct pci_dev *dev)
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+{
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+ enum pcie_link_width width, width_cap;
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+ enum pci_bus_speed speed, speed_cap;
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+ struct pci_dev *limiting_dev = NULL;
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+ u32 bw_avail, bw_cap;
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+
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+ bw_cap = pcie_bandwidth_capable(dev, &speed_cap, &width_cap);
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+ bw_avail = pcie_bandwidth_available(dev, &limiting_dev, &speed, &width);
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+
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+ if (bw_avail >= bw_cap)
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+ pci_info(dev, "%u.%03u Gb/s available bandwidth (%s x%d link)\n",
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+ bw_cap / 1000, bw_cap % 1000,
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+ PCIE_SPEED2STR(speed_cap), width_cap);
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+ else
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+ pci_info(dev, "%u.%03u Gb/s available bandwidth, limited by %s x%d link at %s (capable of %u.%03u Gb/s with %s x%d link)\n",
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+ bw_avail / 1000, bw_avail % 1000,
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+ PCIE_SPEED2STR(speed), width,
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+ limiting_dev ? pci_name(limiting_dev) : "<unknown>",
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+ bw_cap / 1000, bw_cap % 1000,
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+ PCIE_SPEED2STR(speed_cap), width_cap);
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+}
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+EXPORT_SYMBOL(pcie_print_link_status);
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+
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/**
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* pci_select_bars - Make BAR mask from the type of resource
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* @dev: the PCI device for which BAR mask is made
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