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@@ -3,7 +3,7 @@
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* Based on caamalg.c
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*
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* Copyright 2013-2016 Freescale Semiconductor, Inc.
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- * Copyright 2016-2017 NXP
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+ * Copyright 2016-2018 NXP
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*/
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#include "compat.h"
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@@ -43,6 +43,12 @@ struct caam_aead_alg {
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bool registered;
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};
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+struct caam_skcipher_alg {
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+ struct skcipher_alg skcipher;
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+ struct caam_alg_entry caam;
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+ bool registered;
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+};
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+
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/*
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* per-session context
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*/
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@@ -588,18 +594,19 @@ static int rfc4543_setkey(struct crypto_aead *aead,
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return 0;
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}
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-static int ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher,
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- const u8 *key, unsigned int keylen)
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+static int skcipher_setkey(struct crypto_skcipher *skcipher, const u8 *key,
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+ unsigned int keylen)
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{
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- struct caam_ctx *ctx = crypto_ablkcipher_ctx(ablkcipher);
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- struct crypto_tfm *tfm = crypto_ablkcipher_tfm(ablkcipher);
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- const char *alg_name = crypto_tfm_alg_name(tfm);
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+ struct caam_ctx *ctx = crypto_skcipher_ctx(skcipher);
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+ struct caam_skcipher_alg *alg =
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+ container_of(crypto_skcipher_alg(skcipher), typeof(*alg),
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+ skcipher);
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struct device *jrdev = ctx->jrdev;
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- unsigned int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
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+ unsigned int ivsize = crypto_skcipher_ivsize(skcipher);
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u32 ctx1_iv_off = 0;
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const bool ctr_mode = ((ctx->cdata.algtype & OP_ALG_AAI_MASK) ==
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OP_ALG_AAI_CTR_MOD128);
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- const bool is_rfc3686 = (ctr_mode && strstr(alg_name, "rfc3686"));
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+ const bool is_rfc3686 = alg->caam.rfc3686;
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int ret = 0;
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#ifdef DEBUG
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@@ -628,11 +635,11 @@ static int ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher,
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ctx->cdata.key_virt = key;
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ctx->cdata.key_inline = true;
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- /* ablkcipher encrypt, decrypt shared descriptors */
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- cnstr_shdsc_ablkcipher_encap(ctx->sh_desc_enc, &ctx->cdata, ivsize,
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- is_rfc3686, ctx1_iv_off);
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- cnstr_shdsc_ablkcipher_decap(ctx->sh_desc_dec, &ctx->cdata, ivsize,
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- is_rfc3686, ctx1_iv_off);
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+ /* skcipher encrypt, decrypt shared descriptors */
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+ cnstr_shdsc_skcipher_encap(ctx->sh_desc_enc, &ctx->cdata, ivsize,
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+ is_rfc3686, ctx1_iv_off);
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+ cnstr_shdsc_skcipher_decap(ctx->sh_desc_dec, &ctx->cdata, ivsize,
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+ is_rfc3686, ctx1_iv_off);
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/* Now update the driver contexts with the new shared descriptor */
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if (ctx->drv_ctx[ENCRYPT]) {
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@@ -655,14 +662,14 @@ static int ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher,
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return ret;
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badkey:
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- crypto_ablkcipher_set_flags(ablkcipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
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+ crypto_skcipher_set_flags(skcipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
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return -EINVAL;
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}
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-static int xts_ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher,
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- const u8 *key, unsigned int keylen)
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+static int xts_skcipher_setkey(struct crypto_skcipher *skcipher, const u8 *key,
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+ unsigned int keylen)
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{
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- struct caam_ctx *ctx = crypto_ablkcipher_ctx(ablkcipher);
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+ struct caam_ctx *ctx = crypto_skcipher_ctx(skcipher);
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struct device *jrdev = ctx->jrdev;
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int ret = 0;
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@@ -675,9 +682,9 @@ static int xts_ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher,
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ctx->cdata.key_virt = key;
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ctx->cdata.key_inline = true;
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- /* xts ablkcipher encrypt, decrypt shared descriptors */
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- cnstr_shdsc_xts_ablkcipher_encap(ctx->sh_desc_enc, &ctx->cdata);
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- cnstr_shdsc_xts_ablkcipher_decap(ctx->sh_desc_dec, &ctx->cdata);
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+ /* xts skcipher encrypt, decrypt shared descriptors */
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+ cnstr_shdsc_xts_skcipher_encap(ctx->sh_desc_enc, &ctx->cdata);
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+ cnstr_shdsc_xts_skcipher_decap(ctx->sh_desc_dec, &ctx->cdata);
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/* Now update the driver contexts with the new shared descriptor */
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if (ctx->drv_ctx[ENCRYPT]) {
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@@ -700,7 +707,7 @@ static int xts_ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher,
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return ret;
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badkey:
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- crypto_ablkcipher_set_flags(ablkcipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
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+ crypto_skcipher_set_flags(skcipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
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return -EINVAL;
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}
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@@ -729,7 +736,7 @@ struct aead_edesc {
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};
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/*
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- * ablkcipher_edesc - s/w-extended ablkcipher descriptor
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+ * skcipher_edesc - s/w-extended skcipher descriptor
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* @src_nents: number of segments in input scatterlist
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* @dst_nents: number of segments in output scatterlist
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* @iv_dma: dma address of iv for checking continuity and link table
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@@ -738,7 +745,7 @@ struct aead_edesc {
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* @drv_req: driver-specific request structure
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* @sgt: the h/w link table, followed by IV
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*/
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-struct ablkcipher_edesc {
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+struct skcipher_edesc {
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int src_nents;
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int dst_nents;
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dma_addr_t iv_dma;
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@@ -817,12 +824,11 @@ static void aead_unmap(struct device *dev,
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dma_unmap_single(dev, edesc->assoclen_dma, 4, DMA_TO_DEVICE);
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}
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-static void ablkcipher_unmap(struct device *dev,
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- struct ablkcipher_edesc *edesc,
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- struct ablkcipher_request *req)
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+static void skcipher_unmap(struct device *dev, struct skcipher_edesc *edesc,
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+ struct skcipher_request *req)
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{
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- struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
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- int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
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+ struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
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+ int ivsize = crypto_skcipher_ivsize(skcipher);
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caam_unmap(dev, req->src, req->dst, edesc->src_nents, edesc->dst_nents,
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edesc->iv_dma, ivsize, edesc->qm_sg_dma, edesc->qm_sg_bytes);
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@@ -1118,14 +1124,14 @@ static int ipsec_gcm_decrypt(struct aead_request *req)
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return aead_crypt(req, false);
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}
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-static void ablkcipher_done(struct caam_drv_req *drv_req, u32 status)
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+static void skcipher_done(struct caam_drv_req *drv_req, u32 status)
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{
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- struct ablkcipher_edesc *edesc;
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- struct ablkcipher_request *req = drv_req->app_ctx;
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- struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
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- struct caam_ctx *caam_ctx = crypto_ablkcipher_ctx(ablkcipher);
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+ struct skcipher_edesc *edesc;
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+ struct skcipher_request *req = drv_req->app_ctx;
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+ struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
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+ struct caam_ctx *caam_ctx = crypto_skcipher_ctx(skcipher);
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struct device *qidev = caam_ctx->qidev;
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- int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
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+ int ivsize = crypto_skcipher_ivsize(skcipher);
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#ifdef DEBUG
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dev_err(qidev, "%s %d: status 0x%x\n", __func__, __LINE__, status);
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@@ -1138,60 +1144,60 @@ static void ablkcipher_done(struct caam_drv_req *drv_req, u32 status)
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#ifdef DEBUG
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print_hex_dump(KERN_ERR, "dstiv @" __stringify(__LINE__)": ",
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- DUMP_PREFIX_ADDRESS, 16, 4, req->info,
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+ DUMP_PREFIX_ADDRESS, 16, 4, req->iv,
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edesc->src_nents > 1 ? 100 : ivsize, 1);
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caam_dump_sg(KERN_ERR, "dst @" __stringify(__LINE__)": ",
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DUMP_PREFIX_ADDRESS, 16, 4, req->dst,
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- edesc->dst_nents > 1 ? 100 : req->nbytes, 1);
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+ edesc->dst_nents > 1 ? 100 : req->cryptlen, 1);
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#endif
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- ablkcipher_unmap(qidev, edesc, req);
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+ skcipher_unmap(qidev, edesc, req);
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/*
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- * The crypto API expects us to set the IV (req->info) to the last
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+ * The crypto API expects us to set the IV (req->iv) to the last
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* ciphertext block. This is used e.g. by the CTS mode.
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*/
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if (edesc->drv_req.drv_ctx->op_type == ENCRYPT)
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- scatterwalk_map_and_copy(req->info, req->dst, req->nbytes -
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+ scatterwalk_map_and_copy(req->iv, req->dst, req->cryptlen -
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ivsize, ivsize, 0);
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qi_cache_free(edesc);
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- ablkcipher_request_complete(req, status);
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+ skcipher_request_complete(req, status);
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}
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-static struct ablkcipher_edesc *ablkcipher_edesc_alloc(struct ablkcipher_request
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- *req, bool encrypt)
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+static struct skcipher_edesc *skcipher_edesc_alloc(struct skcipher_request *req,
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+ bool encrypt)
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{
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- struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
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- struct caam_ctx *ctx = crypto_ablkcipher_ctx(ablkcipher);
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+ struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
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+ struct caam_ctx *ctx = crypto_skcipher_ctx(skcipher);
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struct device *qidev = ctx->qidev;
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gfp_t flags = (req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP) ?
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GFP_KERNEL : GFP_ATOMIC;
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int src_nents, mapped_src_nents, dst_nents = 0, mapped_dst_nents = 0;
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- struct ablkcipher_edesc *edesc;
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+ struct skcipher_edesc *edesc;
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dma_addr_t iv_dma;
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u8 *iv;
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- int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
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+ int ivsize = crypto_skcipher_ivsize(skcipher);
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int dst_sg_idx, qm_sg_ents, qm_sg_bytes;
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struct qm_sg_entry *sg_table, *fd_sgt;
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struct caam_drv_ctx *drv_ctx;
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drv_ctx = get_drv_ctx(ctx, encrypt ? ENCRYPT : DECRYPT);
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if (unlikely(IS_ERR_OR_NULL(drv_ctx)))
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- return (struct ablkcipher_edesc *)drv_ctx;
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+ return (struct skcipher_edesc *)drv_ctx;
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- src_nents = sg_nents_for_len(req->src, req->nbytes);
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+ src_nents = sg_nents_for_len(req->src, req->cryptlen);
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if (unlikely(src_nents < 0)) {
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dev_err(qidev, "Insufficient bytes (%d) in src S/G\n",
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- req->nbytes);
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+ req->cryptlen);
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return ERR_PTR(src_nents);
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}
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if (unlikely(req->src != req->dst)) {
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- dst_nents = sg_nents_for_len(req->dst, req->nbytes);
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+ dst_nents = sg_nents_for_len(req->dst, req->cryptlen);
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if (unlikely(dst_nents < 0)) {
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dev_err(qidev, "Insufficient bytes (%d) in dst S/G\n",
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- req->nbytes);
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+ req->cryptlen);
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return ERR_PTR(dst_nents);
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}
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@@ -1223,7 +1229,7 @@ static struct ablkcipher_edesc *ablkcipher_edesc_alloc(struct ablkcipher_request
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qm_sg_ents += mapped_dst_nents > 1 ? mapped_dst_nents : 0;
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qm_sg_bytes = qm_sg_ents * sizeof(struct qm_sg_entry);
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- if (unlikely(offsetof(struct ablkcipher_edesc, sgt) + qm_sg_bytes +
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+ if (unlikely(offsetof(struct skcipher_edesc, sgt) + qm_sg_bytes +
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ivsize > CAAM_QI_MEMCACHE_SIZE)) {
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dev_err(qidev, "No space for %d S/G entries and/or %dB IV\n",
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qm_sg_ents, ivsize);
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@@ -1244,7 +1250,7 @@ static struct ablkcipher_edesc *ablkcipher_edesc_alloc(struct ablkcipher_request
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/* Make sure IV is located in a DMAable area */
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sg_table = &edesc->sgt[0];
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iv = (u8 *)(sg_table + qm_sg_ents);
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- memcpy(iv, req->info, ivsize);
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+ memcpy(iv, req->iv, ivsize);
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iv_dma = dma_map_single(qidev, iv, ivsize, DMA_TO_DEVICE);
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if (dma_mapping_error(qidev, iv_dma)) {
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@@ -1260,7 +1266,7 @@ static struct ablkcipher_edesc *ablkcipher_edesc_alloc(struct ablkcipher_request
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edesc->iv_dma = iv_dma;
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edesc->qm_sg_bytes = qm_sg_bytes;
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edesc->drv_req.app_ctx = req;
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- edesc->drv_req.cbk = ablkcipher_done;
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+ edesc->drv_req.cbk = skcipher_done;
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edesc->drv_req.drv_ctx = drv_ctx;
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dma_to_qm_sg_one(sg_table, iv_dma, ivsize, 0);
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@@ -1283,169 +1289,172 @@ static struct ablkcipher_edesc *ablkcipher_edesc_alloc(struct ablkcipher_request
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fd_sgt = &edesc->drv_req.fd_sgt[0];
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dma_to_qm_sg_one_last_ext(&fd_sgt[1], edesc->qm_sg_dma,
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- ivsize + req->nbytes, 0);
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+ ivsize + req->cryptlen, 0);
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if (req->src == req->dst) {
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dma_to_qm_sg_one_ext(&fd_sgt[0], edesc->qm_sg_dma +
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- sizeof(*sg_table), req->nbytes, 0);
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+ sizeof(*sg_table), req->cryptlen, 0);
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} else if (mapped_dst_nents > 1) {
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dma_to_qm_sg_one_ext(&fd_sgt[0], edesc->qm_sg_dma + dst_sg_idx *
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- sizeof(*sg_table), req->nbytes, 0);
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+ sizeof(*sg_table), req->cryptlen, 0);
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} else {
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dma_to_qm_sg_one(&fd_sgt[0], sg_dma_address(req->dst),
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- req->nbytes, 0);
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+ req->cryptlen, 0);
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}
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return edesc;
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}
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-static inline int ablkcipher_crypt(struct ablkcipher_request *req, bool encrypt)
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+static inline int skcipher_crypt(struct skcipher_request *req, bool encrypt)
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{
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- struct ablkcipher_edesc *edesc;
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- struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
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- struct caam_ctx *ctx = crypto_ablkcipher_ctx(ablkcipher);
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- int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
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+ struct skcipher_edesc *edesc;
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+ struct crypto_skcipher *skcipher = crypto_skcipher_reqtfm(req);
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+ struct caam_ctx *ctx = crypto_skcipher_ctx(skcipher);
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+ int ivsize = crypto_skcipher_ivsize(skcipher);
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int ret;
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if (unlikely(caam_congested))
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return -EAGAIN;
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/* allocate extended descriptor */
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- edesc = ablkcipher_edesc_alloc(req, encrypt);
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+ edesc = skcipher_edesc_alloc(req, encrypt);
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if (IS_ERR(edesc))
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return PTR_ERR(edesc);
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/*
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- * The crypto API expects us to set the IV (req->info) to the last
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+ * The crypto API expects us to set the IV (req->iv) to the last
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* ciphertext block.
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*/
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if (!encrypt)
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- scatterwalk_map_and_copy(req->info, req->src, req->nbytes -
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+ scatterwalk_map_and_copy(req->iv, req->src, req->cryptlen -
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ivsize, ivsize, 0);
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ret = caam_qi_enqueue(ctx->qidev, &edesc->drv_req);
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if (!ret) {
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ret = -EINPROGRESS;
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} else {
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- ablkcipher_unmap(ctx->qidev, edesc, req);
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+ skcipher_unmap(ctx->qidev, edesc, req);
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qi_cache_free(edesc);
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}
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return ret;
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}
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-static int ablkcipher_encrypt(struct ablkcipher_request *req)
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+static int skcipher_encrypt(struct skcipher_request *req)
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{
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- return ablkcipher_crypt(req, true);
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+ return skcipher_crypt(req, true);
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}
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-static int ablkcipher_decrypt(struct ablkcipher_request *req)
|
|
|
+static int skcipher_decrypt(struct skcipher_request *req)
|
|
|
{
|
|
|
- return ablkcipher_crypt(req, false);
|
|
|
+ return skcipher_crypt(req, false);
|
|
|
}
|
|
|
|
|
|
-#define template_ablkcipher template_u.ablkcipher
|
|
|
-struct caam_alg_template {
|
|
|
- char name[CRYPTO_MAX_ALG_NAME];
|
|
|
- char driver_name[CRYPTO_MAX_ALG_NAME];
|
|
|
- unsigned int blocksize;
|
|
|
- u32 type;
|
|
|
- union {
|
|
|
- struct ablkcipher_alg ablkcipher;
|
|
|
- } template_u;
|
|
|
- u32 class1_alg_type;
|
|
|
- u32 class2_alg_type;
|
|
|
-};
|
|
|
-
|
|
|
-static struct caam_alg_template driver_algs[] = {
|
|
|
- /* ablkcipher descriptor */
|
|
|
+static struct caam_skcipher_alg driver_algs[] = {
|
|
|
{
|
|
|
- .name = "cbc(aes)",
|
|
|
- .driver_name = "cbc-aes-caam-qi",
|
|
|
- .blocksize = AES_BLOCK_SIZE,
|
|
|
- .template_ablkcipher = {
|
|
|
- .setkey = ablkcipher_setkey,
|
|
|
- .encrypt = ablkcipher_encrypt,
|
|
|
- .decrypt = ablkcipher_decrypt,
|
|
|
+ .skcipher = {
|
|
|
+ .base = {
|
|
|
+ .cra_name = "cbc(aes)",
|
|
|
+ .cra_driver_name = "cbc-aes-caam-qi",
|
|
|
+ .cra_blocksize = AES_BLOCK_SIZE,
|
|
|
+ },
|
|
|
+ .setkey = skcipher_setkey,
|
|
|
+ .encrypt = skcipher_encrypt,
|
|
|
+ .decrypt = skcipher_decrypt,
|
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
},
|
|
|
- .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC,
|
|
|
+ .caam.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CBC,
|
|
|
},
|
|
|
{
|
|
|
- .name = "cbc(des3_ede)",
|
|
|
- .driver_name = "cbc-3des-caam-qi",
|
|
|
- .blocksize = DES3_EDE_BLOCK_SIZE,
|
|
|
- .template_ablkcipher = {
|
|
|
- .setkey = ablkcipher_setkey,
|
|
|
- .encrypt = ablkcipher_encrypt,
|
|
|
- .decrypt = ablkcipher_decrypt,
|
|
|
+ .skcipher = {
|
|
|
+ .base = {
|
|
|
+ .cra_name = "cbc(des3_ede)",
|
|
|
+ .cra_driver_name = "cbc-3des-caam-qi",
|
|
|
+ .cra_blocksize = DES3_EDE_BLOCK_SIZE,
|
|
|
+ },
|
|
|
+ .setkey = skcipher_setkey,
|
|
|
+ .encrypt = skcipher_encrypt,
|
|
|
+ .decrypt = skcipher_decrypt,
|
|
|
.min_keysize = DES3_EDE_KEY_SIZE,
|
|
|
.max_keysize = DES3_EDE_KEY_SIZE,
|
|
|
.ivsize = DES3_EDE_BLOCK_SIZE,
|
|
|
},
|
|
|
- .class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC,
|
|
|
+ .caam.class1_alg_type = OP_ALG_ALGSEL_3DES | OP_ALG_AAI_CBC,
|
|
|
},
|
|
|
{
|
|
|
- .name = "cbc(des)",
|
|
|
- .driver_name = "cbc-des-caam-qi",
|
|
|
- .blocksize = DES_BLOCK_SIZE,
|
|
|
- .template_ablkcipher = {
|
|
|
- .setkey = ablkcipher_setkey,
|
|
|
- .encrypt = ablkcipher_encrypt,
|
|
|
- .decrypt = ablkcipher_decrypt,
|
|
|
+ .skcipher = {
|
|
|
+ .base = {
|
|
|
+ .cra_name = "cbc(des)",
|
|
|
+ .cra_driver_name = "cbc-des-caam-qi",
|
|
|
+ .cra_blocksize = DES_BLOCK_SIZE,
|
|
|
+ },
|
|
|
+ .setkey = skcipher_setkey,
|
|
|
+ .encrypt = skcipher_encrypt,
|
|
|
+ .decrypt = skcipher_decrypt,
|
|
|
.min_keysize = DES_KEY_SIZE,
|
|
|
.max_keysize = DES_KEY_SIZE,
|
|
|
.ivsize = DES_BLOCK_SIZE,
|
|
|
},
|
|
|
- .class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC,
|
|
|
+ .caam.class1_alg_type = OP_ALG_ALGSEL_DES | OP_ALG_AAI_CBC,
|
|
|
},
|
|
|
{
|
|
|
- .name = "ctr(aes)",
|
|
|
- .driver_name = "ctr-aes-caam-qi",
|
|
|
- .blocksize = 1,
|
|
|
- .template_ablkcipher = {
|
|
|
- .setkey = ablkcipher_setkey,
|
|
|
- .encrypt = ablkcipher_encrypt,
|
|
|
- .decrypt = ablkcipher_decrypt,
|
|
|
- .geniv = "chainiv",
|
|
|
+ .skcipher = {
|
|
|
+ .base = {
|
|
|
+ .cra_name = "ctr(aes)",
|
|
|
+ .cra_driver_name = "ctr-aes-caam-qi",
|
|
|
+ .cra_blocksize = 1,
|
|
|
+ },
|
|
|
+ .setkey = skcipher_setkey,
|
|
|
+ .encrypt = skcipher_encrypt,
|
|
|
+ .decrypt = skcipher_decrypt,
|
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
+ .chunksize = AES_BLOCK_SIZE,
|
|
|
},
|
|
|
- .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128,
|
|
|
+ .caam.class1_alg_type = OP_ALG_ALGSEL_AES |
|
|
|
+ OP_ALG_AAI_CTR_MOD128,
|
|
|
},
|
|
|
{
|
|
|
- .name = "rfc3686(ctr(aes))",
|
|
|
- .driver_name = "rfc3686-ctr-aes-caam-qi",
|
|
|
- .blocksize = 1,
|
|
|
- .template_ablkcipher = {
|
|
|
- .setkey = ablkcipher_setkey,
|
|
|
- .encrypt = ablkcipher_encrypt,
|
|
|
- .decrypt = ablkcipher_decrypt,
|
|
|
+ .skcipher = {
|
|
|
+ .base = {
|
|
|
+ .cra_name = "rfc3686(ctr(aes))",
|
|
|
+ .cra_driver_name = "rfc3686-ctr-aes-caam-qi",
|
|
|
+ .cra_blocksize = 1,
|
|
|
+ },
|
|
|
+ .setkey = skcipher_setkey,
|
|
|
+ .encrypt = skcipher_encrypt,
|
|
|
+ .decrypt = skcipher_decrypt,
|
|
|
.min_keysize = AES_MIN_KEY_SIZE +
|
|
|
CTR_RFC3686_NONCE_SIZE,
|
|
|
.max_keysize = AES_MAX_KEY_SIZE +
|
|
|
CTR_RFC3686_NONCE_SIZE,
|
|
|
.ivsize = CTR_RFC3686_IV_SIZE,
|
|
|
+ .chunksize = AES_BLOCK_SIZE,
|
|
|
+ },
|
|
|
+ .caam = {
|
|
|
+ .class1_alg_type = OP_ALG_ALGSEL_AES |
|
|
|
+ OP_ALG_AAI_CTR_MOD128,
|
|
|
+ .rfc3686 = true,
|
|
|
},
|
|
|
- .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_CTR_MOD128,
|
|
|
},
|
|
|
{
|
|
|
- .name = "xts(aes)",
|
|
|
- .driver_name = "xts-aes-caam-qi",
|
|
|
- .blocksize = AES_BLOCK_SIZE,
|
|
|
- .template_ablkcipher = {
|
|
|
- .setkey = xts_ablkcipher_setkey,
|
|
|
- .encrypt = ablkcipher_encrypt,
|
|
|
- .decrypt = ablkcipher_decrypt,
|
|
|
- .geniv = "eseqiv",
|
|
|
+ .skcipher = {
|
|
|
+ .base = {
|
|
|
+ .cra_name = "xts(aes)",
|
|
|
+ .cra_driver_name = "xts-aes-caam-qi",
|
|
|
+ .cra_blocksize = AES_BLOCK_SIZE,
|
|
|
+ },
|
|
|
+ .setkey = xts_skcipher_setkey,
|
|
|
+ .encrypt = skcipher_encrypt,
|
|
|
+ .decrypt = skcipher_decrypt,
|
|
|
.min_keysize = 2 * AES_MIN_KEY_SIZE,
|
|
|
.max_keysize = 2 * AES_MAX_KEY_SIZE,
|
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
|
},
|
|
|
- .class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_XTS,
|
|
|
+ .caam.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_XTS,
|
|
|
},
|
|
|
};
|
|
|
|
|
@@ -2317,12 +2326,6 @@ static struct caam_aead_alg driver_aeads[] = {
|
|
|
},
|
|
|
};
|
|
|
|
|
|
-struct caam_crypto_alg {
|
|
|
- struct list_head entry;
|
|
|
- struct crypto_alg crypto_alg;
|
|
|
- struct caam_alg_entry caam;
|
|
|
-};
|
|
|
-
|
|
|
static int caam_init_common(struct caam_ctx *ctx, struct caam_alg_entry *caam,
|
|
|
bool uses_dkp)
|
|
|
{
|
|
@@ -2365,14 +2368,14 @@ static int caam_init_common(struct caam_ctx *ctx, struct caam_alg_entry *caam,
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
-static int caam_cra_init(struct crypto_tfm *tfm)
|
|
|
+static int caam_cra_init(struct crypto_skcipher *tfm)
|
|
|
{
|
|
|
- struct crypto_alg *alg = tfm->__crt_alg;
|
|
|
- struct caam_crypto_alg *caam_alg = container_of(alg, typeof(*caam_alg),
|
|
|
- crypto_alg);
|
|
|
- struct caam_ctx *ctx = crypto_tfm_ctx(tfm);
|
|
|
+ struct skcipher_alg *alg = crypto_skcipher_alg(tfm);
|
|
|
+ struct caam_skcipher_alg *caam_alg =
|
|
|
+ container_of(alg, typeof(*caam_alg), skcipher);
|
|
|
|
|
|
- return caam_init_common(ctx, &caam_alg->caam, false);
|
|
|
+ return caam_init_common(crypto_skcipher_ctx(tfm), &caam_alg->caam,
|
|
|
+ false);
|
|
|
}
|
|
|
|
|
|
static int caam_aead_init(struct crypto_aead *tfm)
|
|
@@ -2396,9 +2399,9 @@ static void caam_exit_common(struct caam_ctx *ctx)
|
|
|
caam_jr_free(ctx->jrdev);
|
|
|
}
|
|
|
|
|
|
-static void caam_cra_exit(struct crypto_tfm *tfm)
|
|
|
+static void caam_cra_exit(struct crypto_skcipher *tfm)
|
|
|
{
|
|
|
- caam_exit_common(crypto_tfm_ctx(tfm));
|
|
|
+ caam_exit_common(crypto_skcipher_ctx(tfm));
|
|
|
}
|
|
|
|
|
|
static void caam_aead_exit(struct crypto_aead *tfm)
|
|
@@ -2406,10 +2409,8 @@ static void caam_aead_exit(struct crypto_aead *tfm)
|
|
|
caam_exit_common(crypto_aead_ctx(tfm));
|
|
|
}
|
|
|
|
|
|
-static struct list_head alg_list;
|
|
|
static void __exit caam_qi_algapi_exit(void)
|
|
|
{
|
|
|
- struct caam_crypto_alg *t_alg, *n;
|
|
|
int i;
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(driver_aeads); i++) {
|
|
@@ -2419,47 +2420,25 @@ static void __exit caam_qi_algapi_exit(void)
|
|
|
crypto_unregister_aead(&t_alg->aead);
|
|
|
}
|
|
|
|
|
|
- if (!alg_list.next)
|
|
|
- return;
|
|
|
+ for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
|
|
|
+ struct caam_skcipher_alg *t_alg = driver_algs + i;
|
|
|
|
|
|
- list_for_each_entry_safe(t_alg, n, &alg_list, entry) {
|
|
|
- crypto_unregister_alg(&t_alg->crypto_alg);
|
|
|
- list_del(&t_alg->entry);
|
|
|
- kfree(t_alg);
|
|
|
+ if (t_alg->registered)
|
|
|
+ crypto_unregister_skcipher(&t_alg->skcipher);
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-static struct caam_crypto_alg *caam_alg_alloc(struct caam_alg_template
|
|
|
- *template)
|
|
|
+static void caam_skcipher_alg_init(struct caam_skcipher_alg *t_alg)
|
|
|
{
|
|
|
- struct caam_crypto_alg *t_alg;
|
|
|
- struct crypto_alg *alg;
|
|
|
+ struct skcipher_alg *alg = &t_alg->skcipher;
|
|
|
|
|
|
- t_alg = kzalloc(sizeof(*t_alg), GFP_KERNEL);
|
|
|
- if (!t_alg)
|
|
|
- return ERR_PTR(-ENOMEM);
|
|
|
+ alg->base.cra_module = THIS_MODULE;
|
|
|
+ alg->base.cra_priority = CAAM_CRA_PRIORITY;
|
|
|
+ alg->base.cra_ctxsize = sizeof(struct caam_ctx);
|
|
|
+ alg->base.cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;
|
|
|
|
|
|
- alg = &t_alg->crypto_alg;
|
|
|
-
|
|
|
- snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", template->name);
|
|
|
- snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
|
|
|
- template->driver_name);
|
|
|
- alg->cra_module = THIS_MODULE;
|
|
|
- alg->cra_init = caam_cra_init;
|
|
|
- alg->cra_exit = caam_cra_exit;
|
|
|
- alg->cra_priority = CAAM_CRA_PRIORITY;
|
|
|
- alg->cra_blocksize = template->blocksize;
|
|
|
- alg->cra_alignmask = 0;
|
|
|
- alg->cra_ctxsize = sizeof(struct caam_ctx);
|
|
|
- alg->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY |
|
|
|
- CRYPTO_ALG_TYPE_ABLKCIPHER;
|
|
|
- alg->cra_type = &crypto_ablkcipher_type;
|
|
|
- alg->cra_ablkcipher = template->template_ablkcipher;
|
|
|
-
|
|
|
- t_alg->caam.class1_alg_type = template->class1_alg_type;
|
|
|
- t_alg->caam.class2_alg_type = template->class2_alg_type;
|
|
|
-
|
|
|
- return t_alg;
|
|
|
+ alg->init = caam_cra_init;
|
|
|
+ alg->exit = caam_cra_exit;
|
|
|
}
|
|
|
|
|
|
static void caam_aead_alg_init(struct caam_aead_alg *t_alg)
|
|
@@ -2513,8 +2492,6 @@ static int __init caam_qi_algapi_init(void)
|
|
|
return -ENODEV;
|
|
|
}
|
|
|
|
|
|
- INIT_LIST_HEAD(&alg_list);
|
|
|
-
|
|
|
/*
|
|
|
* Register crypto algorithms the device supports.
|
|
|
* First, detect presence and attributes of DES, AES, and MD blocks.
|
|
@@ -2530,9 +2507,8 @@ static int __init caam_qi_algapi_init(void)
|
|
|
md_limit = SHA256_DIGEST_SIZE;
|
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
|
|
|
- struct caam_crypto_alg *t_alg;
|
|
|
- struct caam_alg_template *alg = driver_algs + i;
|
|
|
- u32 alg_sel = alg->class1_alg_type & OP_ALG_ALGSEL_MASK;
|
|
|
+ struct caam_skcipher_alg *t_alg = driver_algs + i;
|
|
|
+ u32 alg_sel = t_alg->caam.class1_alg_type & OP_ALG_ALGSEL_MASK;
|
|
|
|
|
|
/* Skip DES algorithms if not supported by device */
|
|
|
if (!des_inst &&
|
|
@@ -2544,23 +2520,16 @@ static int __init caam_qi_algapi_init(void)
|
|
|
if (!aes_inst && (alg_sel == OP_ALG_ALGSEL_AES))
|
|
|
continue;
|
|
|
|
|
|
- t_alg = caam_alg_alloc(alg);
|
|
|
- if (IS_ERR(t_alg)) {
|
|
|
- err = PTR_ERR(t_alg);
|
|
|
- dev_warn(priv->qidev, "%s alg allocation failed\n",
|
|
|
- alg->driver_name);
|
|
|
- continue;
|
|
|
- }
|
|
|
+ caam_skcipher_alg_init(t_alg);
|
|
|
|
|
|
- err = crypto_register_alg(&t_alg->crypto_alg);
|
|
|
+ err = crypto_register_skcipher(&t_alg->skcipher);
|
|
|
if (err) {
|
|
|
dev_warn(priv->qidev, "%s alg registration failed\n",
|
|
|
- t_alg->crypto_alg.cra_driver_name);
|
|
|
- kfree(t_alg);
|
|
|
+ t_alg->skcipher.base.cra_driver_name);
|
|
|
continue;
|
|
|
}
|
|
|
|
|
|
- list_add_tail(&t_alg->entry, &alg_list);
|
|
|
+ t_alg->registered = true;
|
|
|
registered = true;
|
|
|
}
|
|
|
|