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@@ -1164,6 +1164,18 @@ static int tegra_dc_set_timings(struct tegra_dc *dc,
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return 0;
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}
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+/**
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+ * tegra_dc_state_setup_clock - check clock settings and store them in atomic
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+ * state
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+ * @dc: display controller
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+ * @crtc_state: CRTC atomic state
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+ * @clk: parent clock for display controller
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+ * @pclk: pixel clock
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+ * @div: shift clock divider
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+ *
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+ * Returns:
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+ * 0 on success or a negative error-code on failure.
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+ */
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int tegra_dc_state_setup_clock(struct tegra_dc *dc,
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struct drm_crtc_state *crtc_state,
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struct clk *clk, unsigned long pclk,
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