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@@ -13,7 +13,7 @@
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*
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*
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* Datasheet: http://ams.com/eng/content/download/319364/1117183/file/TCS3472_Datasheet_EN_v2.pdf
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* Datasheet: http://ams.com/eng/content/download/319364/1117183/file/TCS3472_Datasheet_EN_v2.pdf
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*
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*
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- * TODO: interrupt support, thresholds, wait time
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+ * TODO: wait time
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*/
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*/
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#include <linux/module.h>
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#include <linux/module.h>
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@@ -23,6 +23,7 @@
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#include <linux/iio/iio.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/sysfs.h>
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+#include <linux/iio/events.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/triggered_buffer.h>
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#include <linux/iio/triggered_buffer.h>
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@@ -31,12 +32,15 @@
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#define TCS3472_COMMAND BIT(7)
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#define TCS3472_COMMAND BIT(7)
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#define TCS3472_AUTO_INCR BIT(5)
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#define TCS3472_AUTO_INCR BIT(5)
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+#define TCS3472_SPECIAL_FUNC (BIT(5) | BIT(6))
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+
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+#define TCS3472_INTR_CLEAR (TCS3472_COMMAND | TCS3472_SPECIAL_FUNC | 0x06)
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#define TCS3472_ENABLE (TCS3472_COMMAND | 0x00)
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#define TCS3472_ENABLE (TCS3472_COMMAND | 0x00)
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#define TCS3472_ATIME (TCS3472_COMMAND | 0x01)
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#define TCS3472_ATIME (TCS3472_COMMAND | 0x01)
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#define TCS3472_WTIME (TCS3472_COMMAND | 0x03)
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#define TCS3472_WTIME (TCS3472_COMMAND | 0x03)
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-#define TCS3472_AILT (TCS3472_COMMAND | 0x04)
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-#define TCS3472_AIHT (TCS3472_COMMAND | 0x06)
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+#define TCS3472_AILT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x04)
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+#define TCS3472_AIHT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x06)
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#define TCS3472_PERS (TCS3472_COMMAND | 0x0c)
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#define TCS3472_PERS (TCS3472_COMMAND | 0x0c)
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#define TCS3472_CONFIG (TCS3472_COMMAND | 0x0d)
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#define TCS3472_CONFIG (TCS3472_COMMAND | 0x0d)
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#define TCS3472_CONTROL (TCS3472_COMMAND | 0x0f)
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#define TCS3472_CONTROL (TCS3472_COMMAND | 0x0f)
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@@ -47,19 +51,42 @@
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#define TCS3472_GDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x18)
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#define TCS3472_GDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x18)
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#define TCS3472_BDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x1a)
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#define TCS3472_BDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x1a)
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+#define TCS3472_STATUS_AINT BIT(4)
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#define TCS3472_STATUS_AVALID BIT(0)
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#define TCS3472_STATUS_AVALID BIT(0)
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+#define TCS3472_ENABLE_AIEN BIT(4)
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#define TCS3472_ENABLE_AEN BIT(1)
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#define TCS3472_ENABLE_AEN BIT(1)
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#define TCS3472_ENABLE_PON BIT(0)
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#define TCS3472_ENABLE_PON BIT(0)
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#define TCS3472_CONTROL_AGAIN_MASK (BIT(0) | BIT(1))
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#define TCS3472_CONTROL_AGAIN_MASK (BIT(0) | BIT(1))
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struct tcs3472_data {
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struct tcs3472_data {
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struct i2c_client *client;
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struct i2c_client *client;
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+ struct mutex lock;
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+ u16 low_thresh;
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+ u16 high_thresh;
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u8 enable;
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u8 enable;
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u8 control;
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u8 control;
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u8 atime;
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u8 atime;
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+ u8 apers;
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u16 buffer[8]; /* 4 16-bit channels + 64-bit timestamp */
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u16 buffer[8]; /* 4 16-bit channels + 64-bit timestamp */
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};
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};
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+static const struct iio_event_spec tcs3472_events[] = {
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+ {
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+ .type = IIO_EV_TYPE_THRESH,
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+ .dir = IIO_EV_DIR_RISING,
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+ .mask_separate = BIT(IIO_EV_INFO_VALUE),
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+ }, {
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+ .type = IIO_EV_TYPE_THRESH,
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+ .dir = IIO_EV_DIR_FALLING,
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+ .mask_separate = BIT(IIO_EV_INFO_VALUE),
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+ }, {
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+ .type = IIO_EV_TYPE_THRESH,
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+ .dir = IIO_EV_DIR_EITHER,
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+ .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
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+ BIT(IIO_EV_INFO_PERIOD),
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+ },
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+};
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+
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#define TCS3472_CHANNEL(_color, _si, _addr) { \
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#define TCS3472_CHANNEL(_color, _si, _addr) { \
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.type = IIO_INTENSITY, \
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.type = IIO_INTENSITY, \
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.modified = 1, \
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.modified = 1, \
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@@ -75,6 +102,8 @@ struct tcs3472_data {
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.storagebits = 16, \
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.storagebits = 16, \
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.endianness = IIO_CPU, \
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.endianness = IIO_CPU, \
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}, \
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}, \
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+ .event_spec = _si ? NULL : tcs3472_events, \
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+ .num_event_specs = _si ? 0 : ARRAY_SIZE(tcs3472_events), \
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}
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}
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static const int tcs3472_agains[] = { 1, 4, 16, 60 };
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static const int tcs3472_agains[] = { 1, 4, 16, 60 };
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@@ -182,6 +211,166 @@ static int tcs3472_write_raw(struct iio_dev *indio_dev,
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return -EINVAL;
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return -EINVAL;
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}
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}
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+/*
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+ * Translation from APERS field value to the number of consecutive out-of-range
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+ * clear channel values before an interrupt is generated
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+ */
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+static const int tcs3472_intr_pers[] = {
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+ 0, 1, 2, 3, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60
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+};
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+
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+static int tcs3472_read_event(struct iio_dev *indio_dev,
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+ const struct iio_chan_spec *chan, enum iio_event_type type,
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+ enum iio_event_direction dir, enum iio_event_info info, int *val,
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+ int *val2)
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+{
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+ struct tcs3472_data *data = iio_priv(indio_dev);
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+ int ret;
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+ unsigned int period;
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+
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+ mutex_lock(&data->lock);
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+
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+ switch (info) {
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+ case IIO_EV_INFO_VALUE:
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+ *val = (dir == IIO_EV_DIR_RISING) ?
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+ data->high_thresh : data->low_thresh;
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+ ret = IIO_VAL_INT;
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+ break;
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+ case IIO_EV_INFO_PERIOD:
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+ period = (256 - data->atime) * 2400 *
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+ tcs3472_intr_pers[data->apers];
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+ *val = period / USEC_PER_SEC;
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+ *val2 = period % USEC_PER_SEC;
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+ ret = IIO_VAL_INT_PLUS_MICRO;
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+ break;
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+ default:
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+ ret = -EINVAL;
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+ break;
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+ }
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+
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+ mutex_unlock(&data->lock);
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+
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+ return ret;
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+}
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+
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+static int tcs3472_write_event(struct iio_dev *indio_dev,
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+ const struct iio_chan_spec *chan, enum iio_event_type type,
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+ enum iio_event_direction dir, enum iio_event_info info, int val,
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+ int val2)
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+{
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+ struct tcs3472_data *data = iio_priv(indio_dev);
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+ int ret;
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+ u8 command;
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+ int period;
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+ int i;
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+
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+ mutex_lock(&data->lock);
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+ switch (info) {
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+ case IIO_EV_INFO_VALUE:
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+ switch (dir) {
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+ case IIO_EV_DIR_RISING:
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+ command = TCS3472_AIHT;
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+ break;
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+ case IIO_EV_DIR_FALLING:
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+ command = TCS3472_AILT;
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+ break;
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+ default:
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+ ret = -EINVAL;
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+ goto error;
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+ }
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+ ret = i2c_smbus_write_word_data(data->client, command, val);
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+ if (ret)
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+ goto error;
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+
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+ if (dir == IIO_EV_DIR_RISING)
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+ data->high_thresh = val;
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+ else
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+ data->low_thresh = val;
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+ break;
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+ case IIO_EV_INFO_PERIOD:
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+ period = val * USEC_PER_SEC + val2;
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+ for (i = 1; i < ARRAY_SIZE(tcs3472_intr_pers) - 1; i++) {
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+ if (period <= (256 - data->atime) * 2400 *
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+ tcs3472_intr_pers[i])
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+ break;
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+ }
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+ ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS, i);
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+ if (ret)
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+ goto error;
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+
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+ data->apers = i;
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+ break;
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+ default:
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+ ret = -EINVAL;
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+ break;
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+ }
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+error:
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+ mutex_unlock(&data->lock);
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+
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+ return ret;
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+}
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+
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+static int tcs3472_read_event_config(struct iio_dev *indio_dev,
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+ const struct iio_chan_spec *chan, enum iio_event_type type,
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+ enum iio_event_direction dir)
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+{
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+ struct tcs3472_data *data = iio_priv(indio_dev);
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+ int ret;
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+
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+ mutex_lock(&data->lock);
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+ ret = !!(data->enable & TCS3472_ENABLE_AIEN);
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+ mutex_unlock(&data->lock);
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+
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+ return ret;
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+}
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+
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+static int tcs3472_write_event_config(struct iio_dev *indio_dev,
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+ const struct iio_chan_spec *chan, enum iio_event_type type,
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+ enum iio_event_direction dir, int state)
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+{
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+ struct tcs3472_data *data = iio_priv(indio_dev);
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+ int ret = 0;
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+ u8 enable_old;
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+
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+ mutex_lock(&data->lock);
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+
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+ enable_old = data->enable;
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+
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+ if (state)
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+ data->enable |= TCS3472_ENABLE_AIEN;
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+ else
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+ data->enable &= ~TCS3472_ENABLE_AIEN;
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+
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+ if (enable_old != data->enable) {
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+ ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
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+ data->enable);
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+ if (ret)
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+ data->enable = enable_old;
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+ }
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+ mutex_unlock(&data->lock);
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+
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+ return ret;
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+}
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+
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+static irqreturn_t tcs3472_event_handler(int irq, void *priv)
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+{
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+ struct iio_dev *indio_dev = priv;
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+ struct tcs3472_data *data = iio_priv(indio_dev);
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+ int ret;
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+
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+ ret = i2c_smbus_read_byte_data(data->client, TCS3472_STATUS);
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+ if (ret >= 0 && (ret & TCS3472_STATUS_AINT)) {
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+ iio_push_event(indio_dev, IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
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+ IIO_EV_TYPE_THRESH,
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+ IIO_EV_DIR_EITHER),
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+ iio_get_time_ns(indio_dev));
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+
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+ i2c_smbus_read_byte_data(data->client, TCS3472_INTR_CLEAR);
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+ }
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+
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+ return IRQ_HANDLED;
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+}
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+
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static irqreturn_t tcs3472_trigger_handler(int irq, void *p)
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static irqreturn_t tcs3472_trigger_handler(int irq, void *p)
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{
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{
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struct iio_poll_func *pf = p;
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struct iio_poll_func *pf = p;
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@@ -245,6 +434,10 @@ static const struct attribute_group tcs3472_attribute_group = {
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static const struct iio_info tcs3472_info = {
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static const struct iio_info tcs3472_info = {
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.read_raw = tcs3472_read_raw,
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.read_raw = tcs3472_read_raw,
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.write_raw = tcs3472_write_raw,
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.write_raw = tcs3472_write_raw,
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+ .read_event_value = tcs3472_read_event,
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+ .write_event_value = tcs3472_write_event,
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+ .read_event_config = tcs3472_read_event_config,
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+ .write_event_config = tcs3472_write_event_config,
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.attrs = &tcs3472_attribute_group,
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.attrs = &tcs3472_attribute_group,
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};
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};
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@@ -262,6 +455,7 @@ static int tcs3472_probe(struct i2c_client *client,
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data = iio_priv(indio_dev);
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data = iio_priv(indio_dev);
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i2c_set_clientdata(client, indio_dev);
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i2c_set_clientdata(client, indio_dev);
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data->client = client;
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data->client = client;
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+ mutex_init(&data->lock);
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indio_dev->dev.parent = &client->dev;
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indio_dev->dev.parent = &client->dev;
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indio_dev->info = &tcs3472_info;
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indio_dev->info = &tcs3472_info;
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@@ -291,12 +485,29 @@ static int tcs3472_probe(struct i2c_client *client,
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return ret;
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return ret;
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data->atime = ret;
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data->atime = ret;
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+ ret = i2c_smbus_read_word_data(data->client, TCS3472_AILT);
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+ if (ret < 0)
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+ return ret;
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+ data->low_thresh = ret;
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+
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+ ret = i2c_smbus_read_word_data(data->client, TCS3472_AIHT);
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+ if (ret < 0)
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+ return ret;
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+ data->high_thresh = ret;
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+
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+ data->apers = 1;
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+ ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS,
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+ data->apers);
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+ if (ret < 0)
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+ return ret;
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+
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ret = i2c_smbus_read_byte_data(data->client, TCS3472_ENABLE);
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ret = i2c_smbus_read_byte_data(data->client, TCS3472_ENABLE);
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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/* enable device */
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/* enable device */
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data->enable = ret | TCS3472_ENABLE_PON | TCS3472_ENABLE_AEN;
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data->enable = ret | TCS3472_ENABLE_PON | TCS3472_ENABLE_AEN;
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+ data->enable &= ~TCS3472_ENABLE_AIEN;
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ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
|
|
ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
|
|
data->enable);
|
|
data->enable);
|
|
if (ret < 0)
|
|
if (ret < 0)
|
|
@@ -307,12 +518,24 @@ static int tcs3472_probe(struct i2c_client *client,
|
|
if (ret < 0)
|
|
if (ret < 0)
|
|
return ret;
|
|
return ret;
|
|
|
|
|
|
|
|
+ if (client->irq) {
|
|
|
|
+ ret = request_threaded_irq(client->irq, NULL,
|
|
|
|
+ tcs3472_event_handler,
|
|
|
|
+ IRQF_TRIGGER_FALLING | IRQF_SHARED |
|
|
|
|
+ IRQF_ONESHOT,
|
|
|
|
+ client->name, indio_dev);
|
|
|
|
+ if (ret)
|
|
|
|
+ goto buffer_cleanup;
|
|
|
|
+ }
|
|
|
|
+
|
|
ret = iio_device_register(indio_dev);
|
|
ret = iio_device_register(indio_dev);
|
|
if (ret < 0)
|
|
if (ret < 0)
|
|
- goto buffer_cleanup;
|
|
|
|
|
|
+ goto free_irq;
|
|
|
|
|
|
return 0;
|
|
return 0;
|
|
|
|
|
|
|
|
+free_irq:
|
|
|
|
+ free_irq(client->irq, indio_dev);
|
|
buffer_cleanup:
|
|
buffer_cleanup:
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
|
return ret;
|
|
return ret;
|
|
@@ -320,8 +543,19 @@ buffer_cleanup:
|
|
|
|
|
|
static int tcs3472_powerdown(struct tcs3472_data *data)
|
|
static int tcs3472_powerdown(struct tcs3472_data *data)
|
|
{
|
|
{
|
|
- return i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
|
|
|
|
- data->enable & ~(TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON));
|
|
|
|
|
|
+ int ret;
|
|
|
|
+ u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON;
|
|
|
|
+
|
|
|
|
+ mutex_lock(&data->lock);
|
|
|
|
+
|
|
|
|
+ ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
|
|
|
|
+ data->enable & ~enable_mask);
|
|
|
|
+ if (!ret)
|
|
|
|
+ data->enable &= ~enable_mask;
|
|
|
|
+
|
|
|
|
+ mutex_unlock(&data->lock);
|
|
|
|
+
|
|
|
|
+ return ret;
|
|
}
|
|
}
|
|
|
|
|
|
static int tcs3472_remove(struct i2c_client *client)
|
|
static int tcs3472_remove(struct i2c_client *client)
|
|
@@ -329,6 +563,7 @@ static int tcs3472_remove(struct i2c_client *client)
|
|
struct iio_dev *indio_dev = i2c_get_clientdata(client);
|
|
struct iio_dev *indio_dev = i2c_get_clientdata(client);
|
|
|
|
|
|
iio_device_unregister(indio_dev);
|
|
iio_device_unregister(indio_dev);
|
|
|
|
+ free_irq(client->irq, indio_dev);
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
|
iio_triggered_buffer_cleanup(indio_dev);
|
|
tcs3472_powerdown(iio_priv(indio_dev));
|
|
tcs3472_powerdown(iio_priv(indio_dev));
|
|
|
|
|
|
@@ -347,8 +582,19 @@ static int tcs3472_resume(struct device *dev)
|
|
{
|
|
{
|
|
struct tcs3472_data *data = iio_priv(i2c_get_clientdata(
|
|
struct tcs3472_data *data = iio_priv(i2c_get_clientdata(
|
|
to_i2c_client(dev)));
|
|
to_i2c_client(dev)));
|
|
- return i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
|
|
|
|
- data->enable | (TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON));
|
|
|
|
|
|
+ int ret;
|
|
|
|
+ u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON;
|
|
|
|
+
|
|
|
|
+ mutex_lock(&data->lock);
|
|
|
|
+
|
|
|
|
+ ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE,
|
|
|
|
+ data->enable | enable_mask);
|
|
|
|
+ if (!ret)
|
|
|
|
+ data->enable |= enable_mask;
|
|
|
|
+
|
|
|
|
+ mutex_unlock(&data->lock);
|
|
|
|
+
|
|
|
|
+ return ret;
|
|
}
|
|
}
|
|
#endif
|
|
#endif
|
|
|
|
|