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@@ -25,6 +25,7 @@
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#include <linux/phy/phy.h>
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#include <linux/pm_runtime.h>
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#include <linux/of_platform.h>
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+#include <linux/reset.h>
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#include "ahci.h"
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static void ahci_host_stop(struct ata_host *host);
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@@ -195,7 +196,8 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
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* following order:
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* 1) Regulator
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* 2) Clocks (through ahci_platform_enable_clks)
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- * 3) Phys
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+ * 3) Resets
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+ * 4) Phys
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*
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* If resource enabling fails at any point the previous enabled resources
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* are disabled in reverse order.
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@@ -215,12 +217,19 @@ int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
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if (rc)
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goto disable_regulator;
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- rc = ahci_platform_enable_phys(hpriv);
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+ rc = reset_control_deassert(hpriv->rsts);
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if (rc)
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goto disable_clks;
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+ rc = ahci_platform_enable_phys(hpriv);
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+ if (rc)
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+ goto disable_resets;
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+
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return 0;
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+disable_resets:
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+ reset_control_assert(hpriv->rsts);
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+
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disable_clks:
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ahci_platform_disable_clks(hpriv);
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@@ -238,13 +247,16 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
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* This function disables all ahci_platform managed resources in the
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* following order:
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* 1) Phys
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- * 2) Clocks (through ahci_platform_disable_clks)
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- * 3) Regulator
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+ * 2) Resets
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+ * 3) Clocks (through ahci_platform_disable_clks)
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+ * 4) Regulator
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*/
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void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
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{
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ahci_platform_disable_phys(hpriv);
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+ reset_control_assert(hpriv->rsts);
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+
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ahci_platform_disable_clks(hpriv);
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ahci_platform_disable_regulators(hpriv);
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@@ -341,7 +353,8 @@ static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port,
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* 2) regulator for controlling the targets power (optional)
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* 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
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* or for non devicetree enabled platforms a single clock
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- * 4) phys (optional)
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+ * 4) resets, if flags has AHCI_PLATFORM_GET_RESETS (optional)
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+ * 5) phys (optional)
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*
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* RETURNS:
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* The allocated ahci_host_priv on success, otherwise an ERR_PTR value
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@@ -395,6 +408,14 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev,
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hpriv->clks[i] = clk;
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}
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+ if (flags & AHCI_PLATFORM_GET_RESETS) {
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+ hpriv->rsts = devm_reset_control_array_get_optional_shared(dev);
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+ if (IS_ERR(hpriv->rsts)) {
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+ rc = PTR_ERR(hpriv->rsts);
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+ goto err_out;
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+ }
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+ }
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+
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hpriv->nports = child_nodes = of_get_child_count(dev->of_node);
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/*
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