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@@ -2074,7 +2074,7 @@ enum {
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GM_IS_RX_FF_OR = 1<<1, /* Receive FIFO Overrun */
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GM_IS_RX_FF_OR = 1<<1, /* Receive FIFO Overrun */
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GM_IS_RX_COMPL = 1<<0, /* Frame Reception Complete */
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GM_IS_RX_COMPL = 1<<0, /* Frame Reception Complete */
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-#define GMAC_DEF_MSK GM_IS_TX_FF_UR
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+#define GMAC_DEF_MSK (GM_IS_TX_FF_UR | GM_IS_RX_FF_OR)
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};
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};
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/* GMAC_LINK_CTRL 16 bit GMAC Link Control Reg (YUKON only) */
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/* GMAC_LINK_CTRL 16 bit GMAC Link Control Reg (YUKON only) */
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