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@@ -49,7 +49,7 @@ static void setDisplayControl(int ctrl, int dispState)
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{
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cnt++;
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POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg);
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- } while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) !=
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+ } while ((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) !=
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(ulDisplayCtrlReg & ~ulReservedBits));
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printk("Set Panel Plane enbit:after tried %d times\n", cnt);
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}
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@@ -104,7 +104,7 @@ static void setDisplayControl(int ctrl, int dispState)
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{
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cnt++;
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POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg);
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- } while((PEEK32(CRT_DISPLAY_CTRL) & ~ulReservedBits) !=
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+ } while ((PEEK32(CRT_DISPLAY_CTRL) & ~ulReservedBits) !=
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(ulDisplayCtrlReg & ~ulReservedBits));
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printk("Set Crt Plane enbit:after tried %d times\n", cnt);
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}
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@@ -132,7 +132,7 @@ static void setDisplayControl(int ctrl, int dispState)
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static void waitNextVerticalSync(int ctrl, int delay)
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{
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unsigned int status;
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- if(!ctrl){
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+ if (!ctrl){
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/* primary controller */
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/* Do not wait when the Primary PLL is off or display control is already off.
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@@ -233,14 +233,14 @@ static void swPanelPowerSequence(int disp, int delay)
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void ddk750_setLogicalDispOut(disp_output_t output)
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{
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unsigned int reg;
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- if(output & PNL_2_USAGE){
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+ if (output & PNL_2_USAGE){
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/* set panel path controller select */
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reg = PEEK32(PANEL_DISPLAY_CTRL);
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reg = FIELD_VALUE(reg, PANEL_DISPLAY_CTRL, SELECT, (output & PNL_2_MASK)>>PNL_2_OFFSET);
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POKE32(PANEL_DISPLAY_CTRL, reg);
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}
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- if(output & CRT_2_USAGE){
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+ if (output & CRT_2_USAGE){
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/* set crt path controller select */
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reg = PEEK32(CRT_DISPLAY_CTRL);
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reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, SELECT, (output & CRT_2_MASK)>>CRT_2_OFFSET);
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@@ -250,25 +250,25 @@ void ddk750_setLogicalDispOut(disp_output_t output)
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}
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- if(output & PRI_TP_USAGE){
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+ if (output & PRI_TP_USAGE){
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/* set primary timing and plane en_bit */
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setDisplayControl(0, (output&PRI_TP_MASK)>>PRI_TP_OFFSET);
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}
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- if(output & SEC_TP_USAGE){
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+ if (output & SEC_TP_USAGE){
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/* set secondary timing and plane en_bit*/
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setDisplayControl(1, (output&SEC_TP_MASK)>>SEC_TP_OFFSET);
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}
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- if(output & PNL_SEQ_USAGE){
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+ if (output & PNL_SEQ_USAGE){
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/* set panel sequence */
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swPanelPowerSequence((output&PNL_SEQ_MASK)>>PNL_SEQ_OFFSET, 4);
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}
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- if(output & DAC_USAGE)
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+ if (output & DAC_USAGE)
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setDAC((output & DAC_MASK)>>DAC_OFFSET);
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- if(output & DPMS_USAGE)
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+ if (output & DPMS_USAGE)
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ddk750_setDPMS((output & DPMS_MASK) >> DPMS_OFFSET);
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}
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