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@@ -69,6 +69,15 @@ static void phy_write_misc(struct phy_device *phydev,
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phy_write(phydev, MII_BCM54XX_EXP_DATA, value);
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phy_write(phydev, MII_BCM54XX_EXP_DATA, value);
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}
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}
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+static void r_rc_cal_reset(struct phy_device *phydev)
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+{
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+ /* Reset R_CAL/RC_CAL Engine */
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+ phy_write_exp(phydev, 0x00b0, 0x0010);
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+
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+ /* Disable Reset R_AL/RC_CAL Engine */
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+ phy_write_exp(phydev, 0x00b0, 0x0000);
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+}
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+
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static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev)
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static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev)
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{
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{
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/* Increase VCO range to prevent unlocking problem of PLL at low
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/* Increase VCO range to prevent unlocking problem of PLL at low
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@@ -90,11 +99,7 @@ static int bcm7xxx_28nm_b0_afe_config_init(struct phy_device *phydev)
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/* Switch to CORE_BASE1E */
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/* Switch to CORE_BASE1E */
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phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0xd);
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phy_write(phydev, MII_BCM7XXX_CORE_BASE1E, 0xd);
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- /* Reset R_CAL/RC_CAL Engine */
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- phy_write_exp(phydev, CORE_EXPB0, 0x0010);
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-
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- /* Disable Reset R_CAL/RC_CAL Engine */
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- phy_write_exp(phydev, CORE_EXPB0, 0x0000);
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+ r_rc_cal_reset(phydev);
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/* write AFE_RXCONFIG_0 */
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/* write AFE_RXCONFIG_0 */
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phy_write_misc(phydev, AFE_RXCONFIG_0, 0xeb19);
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phy_write_misc(phydev, AFE_RXCONFIG_0, 0xeb19);
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