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@@ -144,6 +144,8 @@
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#define FLEXCAN_MB_CODE_MASK (0xf0ffffff)
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+#define FLEXCAN_TIMEOUT_US (50)
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+
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/*
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* FLEXCAN hardware feature flags
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*
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@@ -269,26 +271,42 @@ static inline int flexcan_has_and_handle_berr(const struct flexcan_priv *priv,
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(reg_esr & FLEXCAN_ESR_ERR_BUS);
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}
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-static inline void flexcan_chip_enable(struct flexcan_priv *priv)
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+static int flexcan_chip_enable(struct flexcan_priv *priv)
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{
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struct flexcan_regs __iomem *regs = priv->base;
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+ unsigned int timeout = FLEXCAN_TIMEOUT_US / 10;
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u32 reg;
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reg = flexcan_read(®s->mcr);
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reg &= ~FLEXCAN_MCR_MDIS;
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flexcan_write(reg, ®s->mcr);
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- udelay(10);
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+ while (timeout-- && (flexcan_read(®s->mcr) & FLEXCAN_MCR_LPM_ACK))
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+ usleep_range(10, 20);
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+
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+ if (flexcan_read(®s->mcr) & FLEXCAN_MCR_LPM_ACK)
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+ return -ETIMEDOUT;
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+
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+ return 0;
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}
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-static inline void flexcan_chip_disable(struct flexcan_priv *priv)
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+static int flexcan_chip_disable(struct flexcan_priv *priv)
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{
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struct flexcan_regs __iomem *regs = priv->base;
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+ unsigned int timeout = FLEXCAN_TIMEOUT_US / 10;
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u32 reg;
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reg = flexcan_read(®s->mcr);
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reg |= FLEXCAN_MCR_MDIS;
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flexcan_write(reg, ®s->mcr);
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+
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+ while (timeout-- && !(flexcan_read(®s->mcr) & FLEXCAN_MCR_LPM_ACK))
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+ usleep_range(10, 20);
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+
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+ if (!(flexcan_read(®s->mcr) & FLEXCAN_MCR_LPM_ACK))
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+ return -ETIMEDOUT;
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+
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+ return 0;
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}
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static int flexcan_get_berr_counter(const struct net_device *dev,
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@@ -709,7 +727,9 @@ static int flexcan_chip_start(struct net_device *dev)
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u32 reg_mcr, reg_ctrl;
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/* enable module */
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- flexcan_chip_enable(priv);
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+ err = flexcan_chip_enable(priv);
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+ if (err)
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+ return err;
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/* soft reset */
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flexcan_write(FLEXCAN_MCR_SOFTRST, ®s->mcr);
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@@ -949,12 +969,16 @@ static int register_flexcandev(struct net_device *dev)
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goto out_disable_ipg;
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/* select "bus clock", chip must be disabled */
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- flexcan_chip_disable(priv);
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+ err = flexcan_chip_disable(priv);
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+ if (err)
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+ goto out_disable_per;
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reg = flexcan_read(®s->ctrl);
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reg |= FLEXCAN_CTRL_CLK_SRC;
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flexcan_write(reg, ®s->ctrl);
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- flexcan_chip_enable(priv);
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+ err = flexcan_chip_enable(priv);
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+ if (err)
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+ goto out_chip_disable;
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/* set freeze, halt and activate FIFO, restrict register access */
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reg = flexcan_read(®s->mcr);
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@@ -971,14 +995,15 @@ static int register_flexcandev(struct net_device *dev)
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if (!(reg & FLEXCAN_MCR_FEN)) {
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netdev_err(dev, "Could not enable RX FIFO, unsupported core\n");
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err = -ENODEV;
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- goto out_disable_per;
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+ goto out_chip_disable;
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}
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err = register_candev(dev);
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- out_disable_per:
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/* disable core and turn off clocks */
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+ out_chip_disable:
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flexcan_chip_disable(priv);
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+ out_disable_per:
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clk_disable_unprepare(priv->clk_per);
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out_disable_ipg:
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clk_disable_unprepare(priv->clk_ipg);
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@@ -1121,8 +1146,11 @@ static int flexcan_suspend(struct device *device)
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{
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struct net_device *dev = dev_get_drvdata(device);
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struct flexcan_priv *priv = netdev_priv(dev);
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+ int err;
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- flexcan_chip_disable(priv);
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+ err = flexcan_chip_disable(priv);
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+ if (err)
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+ return err;
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if (netif_running(dev)) {
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netif_stop_queue(dev);
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@@ -1143,9 +1171,7 @@ static int flexcan_resume(struct device *device)
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netif_device_attach(dev);
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netif_start_queue(dev);
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}
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- flexcan_chip_enable(priv);
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-
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- return 0;
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+ return flexcan_chip_enable(priv);
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}
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#endif /* CONFIG_PM_SLEEP */
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