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@@ -2,11 +2,10 @@
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*******************************************************************************
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** O.S : Linux
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** FILE NAME : arcmsr_hba.c
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-** BY : Nick Cheng
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-** Description: SCSI RAID Device Driver for
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-** ARECA RAID Host adapter
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+** BY : Nick Cheng, C.L. Huang
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+** Description: SCSI RAID Device Driver for Areca RAID Controller
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*******************************************************************************
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-** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
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+** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
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**
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** Web site: www.areca.com.tw
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** E-mail: support@areca.com.tw
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@@ -59,6 +58,7 @@
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/aer.h>
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+#include <linux/circ_buf.h>
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#include <asm/dma.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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@@ -70,15 +70,15 @@
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#include <scsi/scsi_transport.h>
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#include <scsi/scsicam.h>
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#include "arcmsr.h"
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-MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>");
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-MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter");
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+MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
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+MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_VERSION(ARCMSR_DRIVER_VERSION);
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#define ARCMSR_SLEEPTIME 10
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#define ARCMSR_RETRYCOUNT 12
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-wait_queue_head_t wait_q;
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+static wait_queue_head_t wait_q;
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static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
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struct scsi_cmnd *cmd);
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static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
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@@ -89,25 +89,31 @@ static int arcmsr_bios_param(struct scsi_device *sdev,
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static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
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static int arcmsr_probe(struct pci_dev *pdev,
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const struct pci_device_id *id);
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+static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state);
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+static int arcmsr_resume(struct pci_dev *pdev);
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static void arcmsr_remove(struct pci_dev *pdev);
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static void arcmsr_shutdown(struct pci_dev *pdev);
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static void arcmsr_iop_init(struct AdapterControlBlock *acb);
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static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
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static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
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+static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
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+ u32 intmask_org);
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static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
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-static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
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-static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
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+static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
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+static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
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static void arcmsr_request_device_map(unsigned long pacb);
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-static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb);
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-static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb);
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-static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb);
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+static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb);
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+static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb);
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+static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb);
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static void arcmsr_message_isr_bh_fn(struct work_struct *work);
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static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
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static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
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-static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB);
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+static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
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+static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
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static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
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static const char *arcmsr_info(struct Scsi_Host *);
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static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
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+static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
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static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
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int queue_depth, int reason)
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{
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@@ -122,15 +128,14 @@ static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
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static struct scsi_host_template arcmsr_scsi_host_template = {
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.module = THIS_MODULE,
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- .name = "ARCMSR ARECA SATA/SAS RAID Controller"
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- ARCMSR_DRIVER_VERSION,
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+ .name = "Areca SAS/SATA RAID driver",
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.info = arcmsr_info,
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.queuecommand = arcmsr_queue_command,
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.eh_abort_handler = arcmsr_abort,
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.eh_bus_reset_handler = arcmsr_bus_reset,
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.bios_param = arcmsr_bios_param,
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.change_queue_depth = arcmsr_adjust_disk_queue_depth,
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- .can_queue = ARCMSR_MAX_FREECCB_NUM,
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+ .can_queue = ARCMSR_MAX_OUTSTANDING_CMD,
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.this_id = ARCMSR_SCSI_INITIATOR_ID,
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.sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
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.max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
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@@ -139,34 +144,59 @@ static struct scsi_host_template arcmsr_scsi_host_template = {
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.shost_attrs = arcmsr_host_attrs,
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.no_write_same = 1,
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};
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+
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static struct pci_device_id arcmsr_device_id_table[] = {
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
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- {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
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+ .driver_data = ACB_ADAPTER_TYPE_B},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
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+ .driver_data = ACB_ADAPTER_TYPE_B},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
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+ .driver_data = ACB_ADAPTER_TYPE_B},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
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+ .driver_data = ACB_ADAPTER_TYPE_D},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
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+ .driver_data = ACB_ADAPTER_TYPE_A},
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+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
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+ .driver_data = ACB_ADAPTER_TYPE_C},
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{0, 0}, /* Terminating entry */
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};
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MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
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+
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static struct pci_driver arcmsr_pci_driver = {
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.name = "arcmsr",
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.id_table = arcmsr_device_id_table,
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.probe = arcmsr_probe,
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.remove = arcmsr_remove,
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+ .suspend = arcmsr_suspend,
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+ .resume = arcmsr_resume,
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.shutdown = arcmsr_shutdown,
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};
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/*
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@@ -174,16 +204,14 @@ static struct pci_driver arcmsr_pci_driver = {
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****************************************************************************
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*/
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-static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb)
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+static void arcmsr_free_mu(struct AdapterControlBlock *acb)
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{
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switch (acb->adapter_type) {
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- case ACB_ADAPTER_TYPE_A:
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- case ACB_ADAPTER_TYPE_C:
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+ case ACB_ADAPTER_TYPE_B:
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+ case ACB_ADAPTER_TYPE_D: {
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+ dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize,
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+ acb->dma_coherent2, acb->dma_coherent_handle2);
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break;
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- case ACB_ADAPTER_TYPE_B:{
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- dma_free_coherent(&acb->pdev->dev,
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- sizeof(struct MessageUnit_B),
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- acb->pmuB, acb->dma_coherent_handle_hbb_mu);
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}
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}
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}
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@@ -229,6 +257,25 @@ static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
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}
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break;
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}
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+ case ACB_ADAPTER_TYPE_D: {
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+ void __iomem *mem_base0;
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+ unsigned long addr, range, flags;
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+
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+ addr = (unsigned long)pci_resource_start(pdev, 0);
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+ range = pci_resource_len(pdev, 0);
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+ flags = pci_resource_flags(pdev, 0);
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+ if (flags & IORESOURCE_CACHEABLE)
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+ mem_base0 = ioremap(addr, range);
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+ else
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+ mem_base0 = ioremap_nocache(addr, range);
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+ if (!mem_base0) {
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+ pr_notice("arcmsr%d: memory mapping region fail\n",
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+ acb->host->host_no);
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+ return false;
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+ }
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+ acb->mem_base0 = mem_base0;
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+ break;
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+ }
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}
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return true;
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}
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@@ -249,6 +296,10 @@ static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
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case ACB_ADAPTER_TYPE_C:{
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iounmap(acb->pmuC);
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}
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+ break;
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+ case ACB_ADAPTER_TYPE_D:
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+ iounmap(acb->mem_base0);
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+ break;
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}
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}
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@@ -289,27 +340,7 @@ static int arcmsr_bios_param(struct scsi_device *sdev,
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return 0;
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}
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-static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
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-{
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- struct pci_dev *pdev = acb->pdev;
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- u16 dev_id;
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- pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
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- acb->dev_id = dev_id;
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- switch (dev_id) {
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- case 0x1880: {
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- acb->adapter_type = ACB_ADAPTER_TYPE_C;
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- }
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- break;
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- case 0x1201: {
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- acb->adapter_type = ACB_ADAPTER_TYPE_B;
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- }
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- break;
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-
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- default: acb->adapter_type = ACB_ADAPTER_TYPE_A;
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- }
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-}
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-
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-static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
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+static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
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{
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struct MessageUnit_A __iomem *reg = acb->pmuA;
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int i;
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@@ -327,7 +358,7 @@ static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
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return false;
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}
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-static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
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+static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
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{
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struct MessageUnit_B *reg = acb->pmuB;
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int i;
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@@ -347,9 +378,9 @@ static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
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return false;
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}
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-static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB)
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+static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
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{
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- struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
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+ struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
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int i;
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for (i = 0; i < 2000; i++) {
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@@ -365,13 +396,30 @@ static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB)
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return false;
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}
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-static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
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+static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
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+{
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+ struct MessageUnit_D *reg = pACB->pmuD;
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+ int i;
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+
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+ for (i = 0; i < 2000; i++) {
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+ if (readl(reg->outbound_doorbell)
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+ & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
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+ writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
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+ reg->outbound_doorbell);
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+ return true;
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+ }
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+ msleep(10);
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+ } /* max 20 seconds */
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+ return false;
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+}
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+
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+static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
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{
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struct MessageUnit_A __iomem *reg = acb->pmuA;
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int retry_count = 30;
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writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0);
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do {
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- if (arcmsr_hba_wait_msgint_ready(acb))
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+ if (arcmsr_hbaA_wait_msgint_ready(acb))
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break;
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|
|
else {
|
|
|
retry_count--;
|
|
|
@@ -381,13 +429,13 @@ static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
|
|
|
} while (retry_count != 0);
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
int retry_count = 30;
|
|
|
writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
|
|
|
do {
|
|
|
- if (arcmsr_hbb_wait_msgint_ready(acb))
|
|
|
+ if (arcmsr_hbaB_wait_msgint_ready(acb))
|
|
|
break;
|
|
|
else {
|
|
|
retry_count--;
|
|
|
@@ -397,14 +445,14 @@ static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
|
|
|
} while (retry_count != 0);
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB)
|
|
|
+static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
|
|
|
{
|
|
|
- struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = pACB->pmuC;
|
|
|
int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
|
|
|
writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0);
|
|
|
writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
|
|
|
do {
|
|
|
- if (arcmsr_hbc_wait_msgint_ready(pACB)) {
|
|
|
+ if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
|
|
|
break;
|
|
|
} else {
|
|
|
retry_count--;
|
|
|
@@ -414,22 +462,44 @@ static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB)
|
|
|
} while (retry_count != 0);
|
|
|
return;
|
|
|
}
|
|
|
+
|
|
|
+static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
|
|
|
+{
|
|
|
+ int retry_count = 15;
|
|
|
+ struct MessageUnit_D *reg = pACB->pmuD;
|
|
|
+
|
|
|
+ writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
|
|
|
+ do {
|
|
|
+ if (arcmsr_hbaD_wait_msgint_ready(pACB))
|
|
|
+ break;
|
|
|
+
|
|
|
+ retry_count--;
|
|
|
+ pr_notice("arcmsr%d: wait 'flush adapter "
|
|
|
+ "cache' timeout, retry count down = %d\n",
|
|
|
+ pACB->host->host_no, retry_count);
|
|
|
+ } while (retry_count != 0);
|
|
|
+}
|
|
|
+
|
|
|
static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
switch (acb->adapter_type) {
|
|
|
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
|
- arcmsr_flush_hba_cache(acb);
|
|
|
+ arcmsr_hbaA_flush_cache(acb);
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
|
- arcmsr_flush_hbb_cache(acb);
|
|
|
+ arcmsr_hbaB_flush_cache(acb);
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- arcmsr_flush_hbc_cache(acb);
|
|
|
+ arcmsr_hbaC_flush_cache(acb);
|
|
|
}
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D:
|
|
|
+ arcmsr_hbaD_flush_cache(acb);
|
|
|
+ break;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
@@ -473,7 +543,16 @@ static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
|
|
|
acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
|
|
|
for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){
|
|
|
cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
|
|
|
- ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5));
|
|
|
+ switch (acb->adapter_type) {
|
|
|
+ case ACB_ADAPTER_TYPE_A:
|
|
|
+ case ACB_ADAPTER_TYPE_B:
|
|
|
+ ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_C:
|
|
|
+ case ACB_ADAPTER_TYPE_D:
|
|
|
+ ccb_tmp->cdb_phyaddr = cdb_phyaddr;
|
|
|
+ break;
|
|
|
+ }
|
|
|
acb->pccb_pool[i] = ccb_tmp;
|
|
|
ccb_tmp->acb = acb;
|
|
|
INIT_LIST_HEAD(&ccb_tmp->list);
|
|
|
@@ -486,123 +565,128 @@ static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
|
|
|
|
|
|
static void arcmsr_message_isr_bh_fn(struct work_struct *work)
|
|
|
{
|
|
|
- struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh);
|
|
|
+ struct AdapterControlBlock *acb = container_of(work,
|
|
|
+ struct AdapterControlBlock, arcmsr_do_message_isr_bh);
|
|
|
+ char *acb_dev_map = (char *)acb->device_map;
|
|
|
+ uint32_t __iomem *signature = NULL;
|
|
|
+ char __iomem *devicemap = NULL;
|
|
|
+ int target, lun;
|
|
|
+ struct scsi_device *psdev;
|
|
|
+ char diff, temp;
|
|
|
+
|
|
|
switch (acb->adapter_type) {
|
|
|
- case ACB_ADAPTER_TYPE_A: {
|
|
|
+ case ACB_ADAPTER_TYPE_A: {
|
|
|
+ struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
|
|
|
- struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
- char *acb_dev_map = (char *)acb->device_map;
|
|
|
- uint32_t __iomem *signature = (uint32_t __iomem*) (®->message_rwbuffer[0]);
|
|
|
- char __iomem *devicemap = (char __iomem*) (®->message_rwbuffer[21]);
|
|
|
- int target, lun;
|
|
|
- struct scsi_device *psdev;
|
|
|
- char diff;
|
|
|
-
|
|
|
- atomic_inc(&acb->rq_map_token);
|
|
|
- if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
|
|
|
- for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
|
|
|
- diff = (*acb_dev_map)^readb(devicemap);
|
|
|
- if (diff != 0) {
|
|
|
- char temp;
|
|
|
- *acb_dev_map = readb(devicemap);
|
|
|
- temp =*acb_dev_map;
|
|
|
- for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
|
|
|
- if((temp & 0x01)==1 && (diff & 0x01) == 1) {
|
|
|
- scsi_add_device(acb->host, 0, target, lun);
|
|
|
- }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
|
|
|
- psdev = scsi_device_lookup(acb->host, 0, target, lun);
|
|
|
- if (psdev != NULL ) {
|
|
|
- scsi_remove_device(psdev);
|
|
|
- scsi_device_put(psdev);
|
|
|
- }
|
|
|
- }
|
|
|
- temp >>= 1;
|
|
|
- diff >>= 1;
|
|
|
- }
|
|
|
- }
|
|
|
- devicemap++;
|
|
|
- acb_dev_map++;
|
|
|
- }
|
|
|
- }
|
|
|
- break;
|
|
|
- }
|
|
|
+ signature = (uint32_t __iomem *)(®->message_rwbuffer[0]);
|
|
|
+ devicemap = (char __iomem *)(®->message_rwbuffer[21]);
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ case ACB_ADAPTER_TYPE_B: {
|
|
|
+ struct MessageUnit_B *reg = acb->pmuB;
|
|
|
|
|
|
- case ACB_ADAPTER_TYPE_B: {
|
|
|
- struct MessageUnit_B *reg = acb->pmuB;
|
|
|
- char *acb_dev_map = (char *)acb->device_map;
|
|
|
- uint32_t __iomem *signature = (uint32_t __iomem*)(®->message_rwbuffer[0]);
|
|
|
- char __iomem *devicemap = (char __iomem*)(®->message_rwbuffer[21]);
|
|
|
- int target, lun;
|
|
|
- struct scsi_device *psdev;
|
|
|
- char diff;
|
|
|
-
|
|
|
- atomic_inc(&acb->rq_map_token);
|
|
|
- if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
|
|
|
- for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
|
|
|
- diff = (*acb_dev_map)^readb(devicemap);
|
|
|
- if (diff != 0) {
|
|
|
- char temp;
|
|
|
- *acb_dev_map = readb(devicemap);
|
|
|
- temp =*acb_dev_map;
|
|
|
- for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
|
|
|
- if((temp & 0x01)==1 && (diff & 0x01) == 1) {
|
|
|
- scsi_add_device(acb->host, 0, target, lun);
|
|
|
- }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
|
|
|
- psdev = scsi_device_lookup(acb->host, 0, target, lun);
|
|
|
- if (psdev != NULL ) {
|
|
|
- scsi_remove_device(psdev);
|
|
|
- scsi_device_put(psdev);
|
|
|
- }
|
|
|
- }
|
|
|
- temp >>= 1;
|
|
|
- diff >>= 1;
|
|
|
- }
|
|
|
- }
|
|
|
- devicemap++;
|
|
|
- acb_dev_map++;
|
|
|
- }
|
|
|
- }
|
|
|
- }
|
|
|
+ signature = (uint32_t __iomem *)(®->message_rwbuffer[0]);
|
|
|
+ devicemap = (char __iomem *)(®->message_rwbuffer[21]);
|
|
|
break;
|
|
|
- case ACB_ADAPTER_TYPE_C: {
|
|
|
- struct MessageUnit_C *reg = acb->pmuC;
|
|
|
- char *acb_dev_map = (char *)acb->device_map;
|
|
|
- uint32_t __iomem *signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]);
|
|
|
- char __iomem *devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]);
|
|
|
- int target, lun;
|
|
|
- struct scsi_device *psdev;
|
|
|
- char diff;
|
|
|
-
|
|
|
- atomic_inc(&acb->rq_map_token);
|
|
|
- if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
|
|
|
- for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) {
|
|
|
- diff = (*acb_dev_map)^readb(devicemap);
|
|
|
- if (diff != 0) {
|
|
|
- char temp;
|
|
|
- *acb_dev_map = readb(devicemap);
|
|
|
- temp = *acb_dev_map;
|
|
|
- for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
|
|
|
- if ((temp & 0x01) == 1 && (diff & 0x01) == 1) {
|
|
|
- scsi_add_device(acb->host, 0, target, lun);
|
|
|
- } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) {
|
|
|
- psdev = scsi_device_lookup(acb->host, 0, target, lun);
|
|
|
- if (psdev != NULL) {
|
|
|
- scsi_remove_device(psdev);
|
|
|
- scsi_device_put(psdev);
|
|
|
- }
|
|
|
- }
|
|
|
- temp >>= 1;
|
|
|
- diff >>= 1;
|
|
|
- }
|
|
|
+ }
|
|
|
+ case ACB_ADAPTER_TYPE_C: {
|
|
|
+ struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
+
|
|
|
+ signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]);
|
|
|
+ devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]);
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+
|
|
|
+ signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]);
|
|
|
+ devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]);
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ atomic_inc(&acb->rq_map_token);
|
|
|
+ if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
|
|
|
+ return;
|
|
|
+ for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
|
|
|
+ target++) {
|
|
|
+ temp = readb(devicemap);
|
|
|
+ diff = (*acb_dev_map) ^ temp;
|
|
|
+ if (diff != 0) {
|
|
|
+ *acb_dev_map = temp;
|
|
|
+ for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
|
|
|
+ lun++) {
|
|
|
+ if ((diff & 0x01) == 1 &&
|
|
|
+ (temp & 0x01) == 1) {
|
|
|
+ scsi_add_device(acb->host,
|
|
|
+ 0, target, lun);
|
|
|
+ } else if ((diff & 0x01) == 1
|
|
|
+ && (temp & 0x01) == 0) {
|
|
|
+ psdev = scsi_device_lookup(acb->host,
|
|
|
+ 0, target, lun);
|
|
|
+ if (psdev != NULL) {
|
|
|
+ scsi_remove_device(psdev);
|
|
|
+ scsi_device_put(psdev);
|
|
|
}
|
|
|
- devicemap++;
|
|
|
- acb_dev_map++;
|
|
|
}
|
|
|
+ temp >>= 1;
|
|
|
+ diff >>= 1;
|
|
|
}
|
|
|
}
|
|
|
+ devicemap++;
|
|
|
+ acb_dev_map++;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
+static int
|
|
|
+arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
|
|
|
+{
|
|
|
+ int i, j, r;
|
|
|
+ struct msix_entry entries[ARCMST_NUM_MSIX_VECTORS];
|
|
|
+
|
|
|
+ for (i = 0; i < ARCMST_NUM_MSIX_VECTORS; i++)
|
|
|
+ entries[i].entry = i;
|
|
|
+ r = pci_enable_msix_range(pdev, entries, 1, ARCMST_NUM_MSIX_VECTORS);
|
|
|
+ if (r < 0)
|
|
|
+ goto msi_int;
|
|
|
+ acb->msix_vector_count = r;
|
|
|
+ for (i = 0; i < r; i++) {
|
|
|
+ if (request_irq(entries[i].vector,
|
|
|
+ arcmsr_do_interrupt, 0, "arcmsr", acb)) {
|
|
|
+ pr_warn("arcmsr%d: request_irq =%d failed!\n",
|
|
|
+ acb->host->host_no, entries[i].vector);
|
|
|
+ for (j = 0 ; j < i ; j++)
|
|
|
+ free_irq(entries[j].vector, acb);
|
|
|
+ pci_disable_msix(pdev);
|
|
|
+ goto msi_int;
|
|
|
+ }
|
|
|
+ acb->entries[i] = entries[i];
|
|
|
+ }
|
|
|
+ acb->acb_flags |= ACB_F_MSIX_ENABLED;
|
|
|
+ pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
|
|
|
+ return SUCCESS;
|
|
|
+msi_int:
|
|
|
+ if (pci_enable_msi_exact(pdev, 1) < 0)
|
|
|
+ goto legacy_int;
|
|
|
+ if (request_irq(pdev->irq, arcmsr_do_interrupt,
|
|
|
+ IRQF_SHARED, "arcmsr", acb)) {
|
|
|
+ pr_warn("arcmsr%d: request_irq =%d failed!\n",
|
|
|
+ acb->host->host_no, pdev->irq);
|
|
|
+ pci_disable_msi(pdev);
|
|
|
+ goto legacy_int;
|
|
|
+ }
|
|
|
+ acb->acb_flags |= ACB_F_MSI_ENABLED;
|
|
|
+ pr_info("arcmsr%d: msi enabled\n", acb->host->host_no);
|
|
|
+ return SUCCESS;
|
|
|
+legacy_int:
|
|
|
+ if (request_irq(pdev->irq, arcmsr_do_interrupt,
|
|
|
+ IRQF_SHARED, "arcmsr", acb)) {
|
|
|
+ pr_warn("arcmsr%d: request_irq = %d failed!\n",
|
|
|
+ acb->host->host_no, pdev->irq);
|
|
|
+ return FAILED;
|
|
|
+ }
|
|
|
+ return SUCCESS;
|
|
|
+}
|
|
|
+
|
|
|
static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
{
|
|
|
struct Scsi_Host *host;
|
|
|
@@ -637,7 +721,7 @@ static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
host->max_lun = ARCMSR_MAX_TARGETLUN;
|
|
|
host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/
|
|
|
host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/
|
|
|
- host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
|
|
|
+ host->can_queue = ARCMSR_MAX_OUTSTANDING_CMD;
|
|
|
host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
|
|
|
host->this_id = ARCMSR_SCSI_INITIATOR_ID;
|
|
|
host->unique_id = (bus << 8) | dev_fun;
|
|
|
@@ -649,12 +733,16 @@ static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
}
|
|
|
spin_lock_init(&acb->eh_lock);
|
|
|
spin_lock_init(&acb->ccblist_lock);
|
|
|
+ spin_lock_init(&acb->postq_lock);
|
|
|
+ spin_lock_init(&acb->doneq_lock);
|
|
|
+ spin_lock_init(&acb->rqbuffer_lock);
|
|
|
+ spin_lock_init(&acb->wqbuffer_lock);
|
|
|
acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
|
|
|
ACB_F_MESSAGE_RQBUFFER_CLEARED |
|
|
|
ACB_F_MESSAGE_WQBUFFER_READED);
|
|
|
acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
|
|
|
INIT_LIST_HEAD(&acb->ccb_free_list);
|
|
|
- arcmsr_define_adapter_type(acb);
|
|
|
+ acb->adapter_type = id->driver_data;
|
|
|
error = arcmsr_remap_pciregion(acb);
|
|
|
if(!error){
|
|
|
goto pci_release_regs;
|
|
|
@@ -667,17 +755,13 @@ static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
if(error){
|
|
|
goto free_hbb_mu;
|
|
|
}
|
|
|
- arcmsr_iop_init(acb);
|
|
|
error = scsi_add_host(host, &pdev->dev);
|
|
|
if(error){
|
|
|
- goto RAID_controller_stop;
|
|
|
+ goto free_ccb_pool;
|
|
|
}
|
|
|
- error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb);
|
|
|
- if(error){
|
|
|
+ if (arcmsr_request_irq(pdev, acb) == FAILED)
|
|
|
goto scsi_host_remove;
|
|
|
- }
|
|
|
- host->irq = pdev->irq;
|
|
|
- scsi_scan_host(host);
|
|
|
+ arcmsr_iop_init(acb);
|
|
|
INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
|
|
|
atomic_set(&acb->rq_map_token, 16);
|
|
|
atomic_set(&acb->ante_token_value, 16);
|
|
|
@@ -689,16 +773,20 @@ static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|
|
add_timer(&acb->eternal_timer);
|
|
|
if(arcmsr_alloc_sysfs_attr(acb))
|
|
|
goto out_free_sysfs;
|
|
|
+ scsi_scan_host(host);
|
|
|
return 0;
|
|
|
out_free_sysfs:
|
|
|
-scsi_host_remove:
|
|
|
- scsi_remove_host(host);
|
|
|
-RAID_controller_stop:
|
|
|
+ del_timer_sync(&acb->eternal_timer);
|
|
|
+ flush_work(&acb->arcmsr_do_message_isr_bh);
|
|
|
arcmsr_stop_adapter_bgrb(acb);
|
|
|
arcmsr_flush_adapter_cache(acb);
|
|
|
+ arcmsr_free_irq(pdev, acb);
|
|
|
+scsi_host_remove:
|
|
|
+ scsi_remove_host(host);
|
|
|
+free_ccb_pool:
|
|
|
arcmsr_free_ccb_pool(acb);
|
|
|
free_hbb_mu:
|
|
|
- arcmsr_free_hbb_mu(acb);
|
|
|
+ arcmsr_free_mu(acb);
|
|
|
unmap_pci_region:
|
|
|
arcmsr_unmap_pciregion(acb);
|
|
|
pci_release_regs:
|
|
|
@@ -710,75 +798,169 @@ pci_disable_dev:
|
|
|
return -ENODEV;
|
|
|
}
|
|
|
|
|
|
-static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_free_irq(struct pci_dev *pdev,
|
|
|
+ struct AdapterControlBlock *acb)
|
|
|
+{
|
|
|
+ int i;
|
|
|
+
|
|
|
+ if (acb->acb_flags & ACB_F_MSI_ENABLED) {
|
|
|
+ free_irq(pdev->irq, acb);
|
|
|
+ pci_disable_msi(pdev);
|
|
|
+ } else if (acb->acb_flags & ACB_F_MSIX_ENABLED) {
|
|
|
+ for (i = 0; i < acb->msix_vector_count; i++)
|
|
|
+ free_irq(acb->entries[i].vector, acb);
|
|
|
+ pci_disable_msix(pdev);
|
|
|
+ } else
|
|
|
+ free_irq(pdev->irq, acb);
|
|
|
+}
|
|
|
+
|
|
|
+static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state)
|
|
|
+{
|
|
|
+ uint32_t intmask_org;
|
|
|
+ struct Scsi_Host *host = pci_get_drvdata(pdev);
|
|
|
+ struct AdapterControlBlock *acb =
|
|
|
+ (struct AdapterControlBlock *)host->hostdata;
|
|
|
+
|
|
|
+ intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
|
+ arcmsr_free_irq(pdev, acb);
|
|
|
+ del_timer_sync(&acb->eternal_timer);
|
|
|
+ flush_work(&acb->arcmsr_do_message_isr_bh);
|
|
|
+ arcmsr_stop_adapter_bgrb(acb);
|
|
|
+ arcmsr_flush_adapter_cache(acb);
|
|
|
+ pci_set_drvdata(pdev, host);
|
|
|
+ pci_save_state(pdev);
|
|
|
+ pci_disable_device(pdev);
|
|
|
+ pci_set_power_state(pdev, pci_choose_state(pdev, state));
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static int arcmsr_resume(struct pci_dev *pdev)
|
|
|
+{
|
|
|
+ int error;
|
|
|
+ struct Scsi_Host *host = pci_get_drvdata(pdev);
|
|
|
+ struct AdapterControlBlock *acb =
|
|
|
+ (struct AdapterControlBlock *)host->hostdata;
|
|
|
+
|
|
|
+ pci_set_power_state(pdev, PCI_D0);
|
|
|
+ pci_enable_wake(pdev, PCI_D0, 0);
|
|
|
+ pci_restore_state(pdev);
|
|
|
+ if (pci_enable_device(pdev)) {
|
|
|
+ pr_warn("%s: pci_enable_device error\n", __func__);
|
|
|
+ return -ENODEV;
|
|
|
+ }
|
|
|
+ error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
|
|
|
+ if (error) {
|
|
|
+ error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
|
|
+ if (error) {
|
|
|
+ pr_warn("scsi%d: No suitable DMA mask available\n",
|
|
|
+ host->host_no);
|
|
|
+ goto controller_unregister;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ pci_set_master(pdev);
|
|
|
+ if (arcmsr_request_irq(pdev, acb) == FAILED)
|
|
|
+ goto controller_stop;
|
|
|
+ arcmsr_iop_init(acb);
|
|
|
+ INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
|
|
|
+ atomic_set(&acb->rq_map_token, 16);
|
|
|
+ atomic_set(&acb->ante_token_value, 16);
|
|
|
+ acb->fw_flag = FW_NORMAL;
|
|
|
+ init_timer(&acb->eternal_timer);
|
|
|
+ acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
|
|
|
+ acb->eternal_timer.data = (unsigned long) acb;
|
|
|
+ acb->eternal_timer.function = &arcmsr_request_device_map;
|
|
|
+ add_timer(&acb->eternal_timer);
|
|
|
+ return 0;
|
|
|
+controller_stop:
|
|
|
+ arcmsr_stop_adapter_bgrb(acb);
|
|
|
+ arcmsr_flush_adapter_cache(acb);
|
|
|
+controller_unregister:
|
|
|
+ scsi_remove_host(host);
|
|
|
+ arcmsr_free_ccb_pool(acb);
|
|
|
+ arcmsr_unmap_pciregion(acb);
|
|
|
+ pci_release_regions(pdev);
|
|
|
+ scsi_host_put(host);
|
|
|
+ pci_disable_device(pdev);
|
|
|
+ return -ENODEV;
|
|
|
+}
|
|
|
+
|
|
|
+static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0);
|
|
|
- if (!arcmsr_hba_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE
|
|
|
- "arcmsr%d: wait 'abort all outstanding command' timeout \n"
|
|
|
+ "arcmsr%d: wait 'abort all outstanding command' timeout\n"
|
|
|
, acb->host->host_no);
|
|
|
return false;
|
|
|
}
|
|
|
return true;
|
|
|
}
|
|
|
|
|
|
-static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
|
|
|
+static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
|
|
|
writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
|
|
|
- if (!arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE
|
|
|
- "arcmsr%d: wait 'abort all outstanding command' timeout \n"
|
|
|
+ "arcmsr%d: wait 'abort all outstanding command' timeout\n"
|
|
|
, acb->host->host_no);
|
|
|
return false;
|
|
|
}
|
|
|
return true;
|
|
|
}
|
|
|
-static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB)
|
|
|
+static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
|
|
|
{
|
|
|
- struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = pACB->pmuC;
|
|
|
writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0);
|
|
|
writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
|
|
|
- if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
|
|
|
+ if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
|
|
|
printk(KERN_NOTICE
|
|
|
- "arcmsr%d: wait 'abort all outstanding command' timeout \n"
|
|
|
+ "arcmsr%d: wait 'abort all outstanding command' timeout\n"
|
|
|
, pACB->host->host_no);
|
|
|
return false;
|
|
|
}
|
|
|
return true;
|
|
|
}
|
|
|
+
|
|
|
+static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
|
|
|
+{
|
|
|
+ struct MessageUnit_D *reg = pACB->pmuD;
|
|
|
+
|
|
|
+ writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
|
|
|
+ if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
|
|
|
+ pr_notice("arcmsr%d: wait 'abort all outstanding "
|
|
|
+ "command' timeout\n", pACB->host->host_no);
|
|
|
+ return false;
|
|
|
+ }
|
|
|
+ return true;
|
|
|
+}
|
|
|
+
|
|
|
static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
uint8_t rtnval = 0;
|
|
|
switch (acb->adapter_type) {
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
|
- rtnval = arcmsr_abort_hba_allcmd(acb);
|
|
|
+ rtnval = arcmsr_hbaA_abort_allcmd(acb);
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
|
- rtnval = arcmsr_abort_hbb_allcmd(acb);
|
|
|
+ rtnval = arcmsr_hbaB_abort_allcmd(acb);
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- rtnval = arcmsr_abort_hbc_allcmd(acb);
|
|
|
+ rtnval = arcmsr_hbaC_abort_allcmd(acb);
|
|
|
}
|
|
|
- }
|
|
|
- return rtnval;
|
|
|
-}
|
|
|
+ break;
|
|
|
|
|
|
-static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb)
|
|
|
-{
|
|
|
- struct MessageUnit_B *reg = pacb->pmuB;
|
|
|
- writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
|
|
|
- if (!arcmsr_hbb_wait_msgint_ready(pacb)) {
|
|
|
- printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no);
|
|
|
- return false;
|
|
|
+ case ACB_ADAPTER_TYPE_D:
|
|
|
+ rtnval = arcmsr_hbaD_abort_allcmd(acb);
|
|
|
+ break;
|
|
|
}
|
|
|
- return true;
|
|
|
+ return rtnval;
|
|
|
}
|
|
|
|
|
|
static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
|
|
|
@@ -837,12 +1019,18 @@ static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C:{
|
|
|
- struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
/* disable all outbound interrupt */
|
|
|
orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */
|
|
|
writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask);
|
|
|
}
|
|
|
break;
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+ /* disable all outbound interrupt */
|
|
|
+ writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
return orig_mask;
|
|
|
}
|
|
|
@@ -933,7 +1121,7 @@ static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct Comma
|
|
|
static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
int i = 0;
|
|
|
- uint32_t flag_ccb;
|
|
|
+ uint32_t flag_ccb, ccb_cdb_phy;
|
|
|
struct ARCMSR_CDB *pARCMSR_CDB;
|
|
|
bool error;
|
|
|
struct CommandControlBlock *pCCB;
|
|
|
@@ -961,8 +1149,9 @@ static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
|
|
|
/*clear all outbound posted Q*/
|
|
|
writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
|
|
|
for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
|
|
|
- if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) {
|
|
|
- writel(0, ®->done_qbuffer[i]);
|
|
|
+ flag_ccb = reg->done_qbuffer[i];
|
|
|
+ if (flag_ccb != 0) {
|
|
|
+ reg->done_qbuffer[i] = 0;
|
|
|
pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
|
|
|
pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
|
|
|
error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
|
|
|
@@ -975,11 +1164,7 @@ static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- struct MessageUnit_C *reg = acb->pmuC;
|
|
|
- struct ARCMSR_CDB *pARCMSR_CDB;
|
|
|
- uint32_t flag_ccb, ccb_cdb_phy;
|
|
|
- bool error;
|
|
|
- struct CommandControlBlock *pCCB;
|
|
|
+ struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
|
|
|
/*need to do*/
|
|
|
flag_ccb = readl(®->outbound_queueport_low);
|
|
|
@@ -989,9 +1174,54 @@ static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
|
|
|
error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
|
|
|
arcmsr_drain_donequeue(acb, pCCB, error);
|
|
|
}
|
|
|
- }
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ struct MessageUnit_D *pmu = acb->pmuD;
|
|
|
+ uint32_t outbound_write_pointer;
|
|
|
+ uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
|
|
|
+ unsigned long flags;
|
|
|
+
|
|
|
+ residual = atomic_read(&acb->ccboutstandingcount);
|
|
|
+ for (i = 0; i < residual; i++) {
|
|
|
+ spin_lock_irqsave(&acb->doneq_lock, flags);
|
|
|
+ outbound_write_pointer =
|
|
|
+ pmu->done_qbuffer[0].addressLow + 1;
|
|
|
+ doneq_index = pmu->doneq_index;
|
|
|
+ if ((doneq_index & 0xFFF) !=
|
|
|
+ (outbound_write_pointer & 0xFFF)) {
|
|
|
+ toggle = doneq_index & 0x4000;
|
|
|
+ index_stripped = (doneq_index & 0xFFF) + 1;
|
|
|
+ index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
|
|
|
+ pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
|
|
|
+ ((toggle ^ 0x4000) + 1);
|
|
|
+ doneq_index = pmu->doneq_index;
|
|
|
+ spin_unlock_irqrestore(&acb->doneq_lock, flags);
|
|
|
+ addressLow = pmu->done_qbuffer[doneq_index &
|
|
|
+ 0xFFF].addressLow;
|
|
|
+ ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
|
|
|
+ pARCMSR_CDB = (struct ARCMSR_CDB *)
|
|
|
+ (acb->vir2phy_offset + ccb_cdb_phy);
|
|
|
+ pCCB = container_of(pARCMSR_CDB,
|
|
|
+ struct CommandControlBlock, arcmsr_cdb);
|
|
|
+ error = (addressLow &
|
|
|
+ ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
|
|
|
+ true : false;
|
|
|
+ arcmsr_drain_donequeue(acb, pCCB, error);
|
|
|
+ writel(doneq_index,
|
|
|
+ pmu->outboundlist_read_pointer);
|
|
|
+ } else {
|
|
|
+ spin_unlock_irqrestore(&acb->doneq_lock, flags);
|
|
|
+ mdelay(10);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ pmu->postq_index = 0;
|
|
|
+ pmu->doneq_index = 0x40FF;
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
}
|
|
|
+
|
|
|
static void arcmsr_remove(struct pci_dev *pdev)
|
|
|
{
|
|
|
struct Scsi_Host *host = pci_get_drvdata(pdev);
|
|
|
@@ -1029,9 +1259,9 @@ static void arcmsr_remove(struct pci_dev *pdev)
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
- free_irq(pdev->irq, acb);
|
|
|
+ arcmsr_free_irq(pdev, acb);
|
|
|
arcmsr_free_ccb_pool(acb);
|
|
|
- arcmsr_free_hbb_mu(acb);
|
|
|
+ arcmsr_free_mu(acb);
|
|
|
arcmsr_unmap_pciregion(acb);
|
|
|
pci_release_regions(pdev);
|
|
|
scsi_host_put(host);
|
|
|
@@ -1045,6 +1275,7 @@ static void arcmsr_shutdown(struct pci_dev *pdev)
|
|
|
(struct AdapterControlBlock *)host->hostdata;
|
|
|
del_timer_sync(&acb->eternal_timer);
|
|
|
arcmsr_disable_outbound_ints(acb);
|
|
|
+ arcmsr_free_irq(pdev, acb);
|
|
|
flush_work(&acb->arcmsr_do_message_isr_bh);
|
|
|
arcmsr_stop_adapter_bgrb(acb);
|
|
|
arcmsr_flush_adapter_cache(acb);
|
|
|
@@ -1091,11 +1322,19 @@ static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- struct MessageUnit_C *reg = acb->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
|
|
|
writel(intmask_org & mask, ®->host_int_mask);
|
|
|
acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
|
|
|
}
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+
|
|
|
+ mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
|
|
|
+ writel(intmask_org | mask, reg->pcief0_int_enable);
|
|
|
+ break;
|
|
|
+ }
|
|
|
}
|
|
|
}
|
|
|
|
|
|
@@ -1115,7 +1354,7 @@ static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
|
|
|
arcmsr_cdb->TargetID = pcmd->device->id;
|
|
|
arcmsr_cdb->LUN = pcmd->device->lun;
|
|
|
arcmsr_cdb->Function = 1;
|
|
|
- arcmsr_cdb->Context = 0;
|
|
|
+ arcmsr_cdb->msgContext = 0;
|
|
|
memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
|
|
|
|
|
|
nseg = scsi_dma_map(pcmd);
|
|
|
@@ -1156,7 +1395,7 @@ static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
|
|
|
|
|
|
static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
|
|
|
{
|
|
|
- uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern;
|
|
|
+ uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
|
|
|
struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
|
|
|
atomic_inc(&acb->ccboutstandingcount);
|
|
|
ccb->startdone = ARCMSR_CCB_START;
|
|
|
@@ -1165,25 +1404,24 @@ static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandContr
|
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
|
|
|
if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
|
|
|
- writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
|
|
|
+ writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
|
|
|
®->inbound_queueport);
|
|
|
- else {
|
|
|
- writel(cdb_phyaddr_pattern, ®->inbound_queueport);
|
|
|
- }
|
|
|
- }
|
|
|
+ else
|
|
|
+ writel(cdb_phyaddr, ®->inbound_queueport);
|
|
|
break;
|
|
|
+ }
|
|
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
uint32_t ending_index, index = reg->postq_index;
|
|
|
|
|
|
ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
|
|
|
- writel(0, ®->post_qbuffer[ending_index]);
|
|
|
+ reg->post_qbuffer[ending_index] = 0;
|
|
|
if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
|
|
|
- writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
|
|
|
- ®->post_qbuffer[index]);
|
|
|
+ reg->post_qbuffer[index] =
|
|
|
+ cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
|
|
|
} else {
|
|
|
- writel(cdb_phyaddr_pattern, ®->post_qbuffer[index]);
|
|
|
+ reg->post_qbuffer[index] = cdb_phyaddr;
|
|
|
}
|
|
|
index++;
|
|
|
index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
|
|
|
@@ -1192,11 +1430,11 @@ static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandContr
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
|
|
|
uint32_t ccb_post_stamp, arc_cdb_size;
|
|
|
|
|
|
arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
|
|
|
- ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1);
|
|
|
+ ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
|
|
|
if (acb->cdb_phyaddr_hi32) {
|
|
|
writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
|
|
|
writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
|
|
|
@@ -1204,62 +1442,102 @@ static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandContr
|
|
|
writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
|
|
|
}
|
|
|
}
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ struct MessageUnit_D *pmu = acb->pmuD;
|
|
|
+ u16 index_stripped;
|
|
|
+ u16 postq_index, toggle;
|
|
|
+ unsigned long flags;
|
|
|
+ struct InBound_SRB *pinbound_srb;
|
|
|
+
|
|
|
+ spin_lock_irqsave(&acb->postq_lock, flags);
|
|
|
+ postq_index = pmu->postq_index;
|
|
|
+ pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
|
|
|
+ pinbound_srb->addressHigh = dma_addr_hi32(cdb_phyaddr);
|
|
|
+ pinbound_srb->addressLow = dma_addr_lo32(cdb_phyaddr);
|
|
|
+ pinbound_srb->length = ccb->arc_cdb_size >> 2;
|
|
|
+ arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
|
|
|
+ toggle = postq_index & 0x4000;
|
|
|
+ index_stripped = postq_index + 1;
|
|
|
+ index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
|
|
|
+ pmu->postq_index = index_stripped ? (index_stripped | toggle) :
|
|
|
+ (toggle ^ 0x4000);
|
|
|
+ writel(postq_index, pmu->inboundlist_write_pointer);
|
|
|
+ spin_unlock_irqrestore(&acb->postq_lock, flags);
|
|
|
+ break;
|
|
|
+ }
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
|
|
|
writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0);
|
|
|
- if (!arcmsr_hba_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE
|
|
|
- "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
|
|
|
+ "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
|
|
|
, acb->host->host_no);
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
|
|
|
writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
|
|
|
|
|
|
- if (!arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE
|
|
|
- "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
|
|
|
+ "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
|
|
|
, acb->host->host_no);
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB)
|
|
|
+static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
|
|
|
{
|
|
|
- struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = pACB->pmuC;
|
|
|
pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
|
|
|
writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0);
|
|
|
writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
|
|
|
- if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
|
|
|
+ if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
|
|
|
printk(KERN_NOTICE
|
|
|
- "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
|
|
|
+ "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
|
|
|
, pACB->host->host_no);
|
|
|
}
|
|
|
return;
|
|
|
}
|
|
|
+
|
|
|
+static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
|
|
|
+{
|
|
|
+ struct MessageUnit_D *reg = pACB->pmuD;
|
|
|
+
|
|
|
+ pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
|
|
|
+ writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
|
|
|
+ if (!arcmsr_hbaD_wait_msgint_ready(pACB))
|
|
|
+ pr_notice("arcmsr%d: wait 'stop adapter background rebulid' "
|
|
|
+ "timeout\n", pACB->host->host_no);
|
|
|
+}
|
|
|
+
|
|
|
static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
switch (acb->adapter_type) {
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
|
- arcmsr_stop_hba_bgrb(acb);
|
|
|
+ arcmsr_hbaA_stop_bgrb(acb);
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
|
- arcmsr_stop_hbb_bgrb(acb);
|
|
|
+ arcmsr_hbaB_stop_bgrb(acb);
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- arcmsr_stop_hbc_bgrb(acb);
|
|
|
+ arcmsr_hbaC_stop_bgrb(acb);
|
|
|
}
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D:
|
|
|
+ arcmsr_hbaD_stop_bgrb(acb);
|
|
|
+ break;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
@@ -1268,7 +1546,7 @@ static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
|
|
|
dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
|
|
|
}
|
|
|
|
|
|
-void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
switch (acb->adapter_type) {
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
|
@@ -1284,8 +1562,16 @@ void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
+
|
|
|
writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell);
|
|
|
}
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+ writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
|
|
|
+ reg->inbound_doorbell);
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
@@ -1320,6 +1606,12 @@ static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
|
|
|
writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell);
|
|
|
}
|
|
|
break;
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+ writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
|
|
|
+ reg->inbound_doorbell);
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
@@ -1340,9 +1632,15 @@ struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
|
|
|
qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
|
|
|
}
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+ qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
return qbuffer;
|
|
|
}
|
|
|
@@ -1364,96 +1662,208 @@ static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBloc
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer;
|
|
|
- }
|
|
|
-
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+ pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
return pqbuffer;
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
|
|
|
+static uint32_t
|
|
|
+arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
|
|
|
+ struct QBUFFER __iomem *prbuffer)
|
|
|
{
|
|
|
- struct QBUFFER __iomem *prbuffer;
|
|
|
- struct QBUFFER *pQbuffer;
|
|
|
- uint8_t __iomem *iop_data;
|
|
|
- int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
|
|
|
- rqbuf_lastindex = acb->rqbuf_lastindex;
|
|
|
- rqbuf_firstindex = acb->rqbuf_firstindex;
|
|
|
- prbuffer = arcmsr_get_iop_rqbuffer(acb);
|
|
|
- iop_data = (uint8_t __iomem *)prbuffer->data;
|
|
|
- iop_len = prbuffer->data_len;
|
|
|
- my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1);
|
|
|
-
|
|
|
- if (my_empty_len >= iop_len)
|
|
|
- {
|
|
|
- while (iop_len > 0) {
|
|
|
- pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
|
|
|
- memcpy(pQbuffer, iop_data, 1);
|
|
|
- rqbuf_lastindex++;
|
|
|
- rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
|
|
|
+ uint8_t *pQbuffer;
|
|
|
+ uint8_t *buf1 = NULL;
|
|
|
+ uint32_t __iomem *iop_data;
|
|
|
+ uint32_t iop_len, data_len, *buf2 = NULL;
|
|
|
+
|
|
|
+ iop_data = (uint32_t __iomem *)prbuffer->data;
|
|
|
+ iop_len = readl(&prbuffer->data_len);
|
|
|
+ if (iop_len > 0) {
|
|
|
+ buf1 = kmalloc(128, GFP_ATOMIC);
|
|
|
+ buf2 = (uint32_t *)buf1;
|
|
|
+ if (buf1 == NULL)
|
|
|
+ return 0;
|
|
|
+ data_len = iop_len;
|
|
|
+ while (data_len >= 4) {
|
|
|
+ *buf2++ = readl(iop_data);
|
|
|
iop_data++;
|
|
|
- iop_len--;
|
|
|
+ data_len -= 4;
|
|
|
}
|
|
|
- acb->rqbuf_lastindex = rqbuf_lastindex;
|
|
|
- arcmsr_iop_message_read(acb);
|
|
|
+ if (data_len)
|
|
|
+ *buf2 = readl(iop_data);
|
|
|
+ buf2 = (uint32_t *)buf1;
|
|
|
}
|
|
|
+ while (iop_len > 0) {
|
|
|
+ pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
|
|
|
+ *pQbuffer = *buf1;
|
|
|
+ acb->rqbuf_putIndex++;
|
|
|
+ /* if last, index number set it to 0 */
|
|
|
+ acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
|
|
|
+ buf1++;
|
|
|
+ iop_len--;
|
|
|
+ }
|
|
|
+ kfree(buf2);
|
|
|
+ /* let IOP know data has been read */
|
|
|
+ arcmsr_iop_message_read(acb);
|
|
|
+ return 1;
|
|
|
+}
|
|
|
+
|
|
|
+uint32_t
|
|
|
+arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
|
|
|
+ struct QBUFFER __iomem *prbuffer) {
|
|
|
+
|
|
|
+ uint8_t *pQbuffer;
|
|
|
+ uint8_t __iomem *iop_data;
|
|
|
+ uint32_t iop_len;
|
|
|
+
|
|
|
+ if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D))
|
|
|
+ return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
|
|
|
+ iop_data = (uint8_t __iomem *)prbuffer->data;
|
|
|
+ iop_len = readl(&prbuffer->data_len);
|
|
|
+ while (iop_len > 0) {
|
|
|
+ pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
|
|
|
+ *pQbuffer = readb(iop_data);
|
|
|
+ acb->rqbuf_putIndex++;
|
|
|
+ acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
|
|
|
+ iop_data++;
|
|
|
+ iop_len--;
|
|
|
+ }
|
|
|
+ arcmsr_iop_message_read(acb);
|
|
|
+ return 1;
|
|
|
+}
|
|
|
+
|
|
|
+static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
|
|
|
+{
|
|
|
+ unsigned long flags;
|
|
|
+ struct QBUFFER __iomem *prbuffer;
|
|
|
+ int32_t buf_empty_len;
|
|
|
|
|
|
- else {
|
|
|
+ spin_lock_irqsave(&acb->rqbuffer_lock, flags);
|
|
|
+ prbuffer = arcmsr_get_iop_rqbuffer(acb);
|
|
|
+ buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) &
|
|
|
+ (ARCMSR_MAX_QBUFFER - 1);
|
|
|
+ if (buf_empty_len >= readl(&prbuffer->data_len)) {
|
|
|
+ if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
|
|
|
+ acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
|
|
|
+ } else
|
|
|
acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
|
|
|
+ spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
|
|
|
+}
|
|
|
+
|
|
|
+static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
|
|
|
+{
|
|
|
+ uint8_t *pQbuffer;
|
|
|
+ struct QBUFFER __iomem *pwbuffer;
|
|
|
+ uint8_t *buf1 = NULL;
|
|
|
+ uint32_t __iomem *iop_data;
|
|
|
+ uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
|
|
|
+
|
|
|
+ if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
|
|
|
+ buf1 = kmalloc(128, GFP_ATOMIC);
|
|
|
+ buf2 = (uint32_t *)buf1;
|
|
|
+ if (buf1 == NULL)
|
|
|
+ return;
|
|
|
+
|
|
|
+ acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
|
|
|
+ pwbuffer = arcmsr_get_iop_wqbuffer(acb);
|
|
|
+ iop_data = (uint32_t __iomem *)pwbuffer->data;
|
|
|
+ while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
|
|
|
+ && (allxfer_len < 124)) {
|
|
|
+ pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
|
|
|
+ *buf1 = *pQbuffer;
|
|
|
+ acb->wqbuf_getIndex++;
|
|
|
+ acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
|
|
|
+ buf1++;
|
|
|
+ allxfer_len++;
|
|
|
+ }
|
|
|
+ data_len = allxfer_len;
|
|
|
+ buf1 = (uint8_t *)buf2;
|
|
|
+ while (data_len >= 4) {
|
|
|
+ data = *buf2++;
|
|
|
+ writel(data, iop_data);
|
|
|
+ iop_data++;
|
|
|
+ data_len -= 4;
|
|
|
+ }
|
|
|
+ if (data_len) {
|
|
|
+ data = *buf2;
|
|
|
+ writel(data, iop_data);
|
|
|
+ }
|
|
|
+ writel(allxfer_len, &pwbuffer->data_len);
|
|
|
+ kfree(buf1);
|
|
|
+ arcmsr_iop_message_wrote(acb);
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
|
|
|
+void
|
|
|
+arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
- acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
|
|
|
- if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
|
|
|
- uint8_t *pQbuffer;
|
|
|
- struct QBUFFER __iomem *pwbuffer;
|
|
|
- uint8_t __iomem *iop_data;
|
|
|
- int32_t allxfer_len = 0;
|
|
|
+ uint8_t *pQbuffer;
|
|
|
+ struct QBUFFER __iomem *pwbuffer;
|
|
|
+ uint8_t __iomem *iop_data;
|
|
|
+ int32_t allxfer_len = 0;
|
|
|
|
|
|
+ if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) {
|
|
|
+ arcmsr_write_ioctldata2iop_in_DWORD(acb);
|
|
|
+ return;
|
|
|
+ }
|
|
|
+ if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
|
|
|
acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
|
|
|
pwbuffer = arcmsr_get_iop_wqbuffer(acb);
|
|
|
iop_data = (uint8_t __iomem *)pwbuffer->data;
|
|
|
-
|
|
|
- while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
|
|
|
- (allxfer_len < 124)) {
|
|
|
- pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
|
|
|
- memcpy(iop_data, pQbuffer, 1);
|
|
|
- acb->wqbuf_firstindex++;
|
|
|
- acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
|
|
|
+ while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
|
|
|
+ && (allxfer_len < 124)) {
|
|
|
+ pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
|
|
|
+ writeb(*pQbuffer, iop_data);
|
|
|
+ acb->wqbuf_getIndex++;
|
|
|
+ acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
|
|
|
iop_data++;
|
|
|
allxfer_len++;
|
|
|
}
|
|
|
- pwbuffer->data_len = allxfer_len;
|
|
|
-
|
|
|
+ writel(allxfer_len, &pwbuffer->data_len);
|
|
|
arcmsr_iop_message_wrote(acb);
|
|
|
}
|
|
|
+}
|
|
|
|
|
|
- if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
|
|
|
+static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
|
|
|
+{
|
|
|
+ unsigned long flags;
|
|
|
+
|
|
|
+ spin_lock_irqsave(&acb->wqbuffer_lock, flags);
|
|
|
+ acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
|
|
|
+ if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
|
|
|
+ arcmsr_write_ioctldata2iop(acb);
|
|
|
+ if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
|
|
|
acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
|
|
|
- }
|
|
|
+ spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
uint32_t outbound_doorbell;
|
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
outbound_doorbell = readl(®->outbound_doorbell);
|
|
|
- writel(outbound_doorbell, ®->outbound_doorbell);
|
|
|
- if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
|
|
|
- arcmsr_iop2drv_data_wrote_handle(acb);
|
|
|
- }
|
|
|
-
|
|
|
- if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
|
|
|
- arcmsr_iop2drv_data_read_handle(acb);
|
|
|
- }
|
|
|
+ do {
|
|
|
+ writel(outbound_doorbell, ®->outbound_doorbell);
|
|
|
+ if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
|
|
|
+ arcmsr_iop2drv_data_wrote_handle(acb);
|
|
|
+ if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
|
|
|
+ arcmsr_iop2drv_data_read_handle(acb);
|
|
|
+ outbound_doorbell = readl(®->outbound_doorbell);
|
|
|
+ } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
|
|
|
+ | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
|
|
|
}
|
|
|
-static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB)
|
|
|
+static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
|
|
|
{
|
|
|
uint32_t outbound_doorbell;
|
|
|
- struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = pACB->pmuC;
|
|
|
/*
|
|
|
*******************************************************************
|
|
|
** Maybe here we need to check wrqbuffer_lock is lock or not
|
|
|
@@ -1462,19 +1872,42 @@ static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB)
|
|
|
*******************************************************************
|
|
|
*/
|
|
|
outbound_doorbell = readl(®->outbound_doorbell);
|
|
|
- writel(outbound_doorbell, ®->outbound_doorbell_clear);/*clear interrupt*/
|
|
|
- if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
|
|
|
- arcmsr_iop2drv_data_wrote_handle(pACB);
|
|
|
- }
|
|
|
- if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) {
|
|
|
- arcmsr_iop2drv_data_read_handle(pACB);
|
|
|
- }
|
|
|
- if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
|
|
|
- arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */
|
|
|
- }
|
|
|
- return;
|
|
|
+ do {
|
|
|
+ writel(outbound_doorbell, ®->outbound_doorbell_clear);
|
|
|
+ readl(®->outbound_doorbell_clear);
|
|
|
+ if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
|
|
|
+ arcmsr_iop2drv_data_wrote_handle(pACB);
|
|
|
+ if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
|
|
|
+ arcmsr_iop2drv_data_read_handle(pACB);
|
|
|
+ if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
|
|
|
+ arcmsr_hbaC_message_isr(pACB);
|
|
|
+ outbound_doorbell = readl(®->outbound_doorbell);
|
|
|
+ } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
|
|
|
+ | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
|
|
|
+ | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
|
|
|
+}
|
|
|
+
|
|
|
+static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
|
|
|
+{
|
|
|
+ uint32_t outbound_doorbell;
|
|
|
+ struct MessageUnit_D *pmu = pACB->pmuD;
|
|
|
+
|
|
|
+ outbound_doorbell = readl(pmu->outbound_doorbell);
|
|
|
+ do {
|
|
|
+ writel(outbound_doorbell, pmu->outbound_doorbell);
|
|
|
+ if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
|
|
|
+ arcmsr_hbaD_message_isr(pACB);
|
|
|
+ if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
|
|
|
+ arcmsr_iop2drv_data_wrote_handle(pACB);
|
|
|
+ if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
|
|
|
+ arcmsr_iop2drv_data_read_handle(pACB);
|
|
|
+ outbound_doorbell = readl(pmu->outbound_doorbell);
|
|
|
+ } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
|
|
|
+ | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
|
|
|
+ | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
|
|
|
}
|
|
|
-static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
|
|
|
+
|
|
|
+static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
uint32_t flag_ccb;
|
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
@@ -1488,7 +1921,7 @@ static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
|
|
|
arcmsr_drain_donequeue(acb, pCCB, error);
|
|
|
}
|
|
|
}
|
|
|
-static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
uint32_t index;
|
|
|
uint32_t flag_ccb;
|
|
|
@@ -1497,8 +1930,8 @@ static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
|
|
|
struct CommandControlBlock *pCCB;
|
|
|
bool error;
|
|
|
index = reg->doneq_index;
|
|
|
- while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) {
|
|
|
- writel(0, ®->done_qbuffer[index]);
|
|
|
+ while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
|
|
|
+ reg->done_qbuffer[index] = 0;
|
|
|
pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
|
|
|
pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
|
|
|
error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
|
|
|
@@ -1509,35 +1942,80 @@ static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
- struct MessageUnit_C *phbcmu;
|
|
|
+ struct MessageUnit_C __iomem *phbcmu;
|
|
|
struct ARCMSR_CDB *arcmsr_cdb;
|
|
|
struct CommandControlBlock *ccb;
|
|
|
uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
|
|
|
int error;
|
|
|
|
|
|
- phbcmu = (struct MessageUnit_C *)acb->pmuC;
|
|
|
+ phbcmu = acb->pmuC;
|
|
|
/* areca cdb command done */
|
|
|
/* Use correct offset and size for syncing */
|
|
|
|
|
|
- while (readl(&phbcmu->host_int_status) &
|
|
|
- ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){
|
|
|
- /* check if command done with no error*/
|
|
|
- flag_ccb = readl(&phbcmu->outbound_queueport_low);
|
|
|
- ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/
|
|
|
- arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
|
|
|
- ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
|
|
|
- error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
|
|
|
- /* check if command done with no error */
|
|
|
- arcmsr_drain_donequeue(acb, ccb, error);
|
|
|
- if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
|
|
|
- writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell);
|
|
|
- break;
|
|
|
- }
|
|
|
- throttling++;
|
|
|
+ while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
|
|
|
+ 0xFFFFFFFF) {
|
|
|
+ ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
|
|
|
+ arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
|
|
|
+ + ccb_cdb_phy);
|
|
|
+ ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
|
|
|
+ arcmsr_cdb);
|
|
|
+ error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
|
|
|
+ ? true : false;
|
|
|
+ /* check if command done with no error */
|
|
|
+ arcmsr_drain_donequeue(acb, ccb, error);
|
|
|
+ throttling++;
|
|
|
+ if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
|
|
|
+ writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
|
|
|
+ &phbcmu->inbound_doorbell);
|
|
|
+ throttling = 0;
|
|
|
+ }
|
|
|
}
|
|
|
}
|
|
|
+
|
|
|
+static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
|
|
|
+{
|
|
|
+ u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
|
|
|
+ uint32_t addressLow, ccb_cdb_phy;
|
|
|
+ int error;
|
|
|
+ struct MessageUnit_D *pmu;
|
|
|
+ struct ARCMSR_CDB *arcmsr_cdb;
|
|
|
+ struct CommandControlBlock *ccb;
|
|
|
+ unsigned long flags;
|
|
|
+
|
|
|
+ spin_lock_irqsave(&acb->doneq_lock, flags);
|
|
|
+ pmu = acb->pmuD;
|
|
|
+ outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
|
|
|
+ doneq_index = pmu->doneq_index;
|
|
|
+ if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
|
|
|
+ do {
|
|
|
+ toggle = doneq_index & 0x4000;
|
|
|
+ index_stripped = (doneq_index & 0xFFF) + 1;
|
|
|
+ index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
|
|
|
+ pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
|
|
|
+ ((toggle ^ 0x4000) + 1);
|
|
|
+ doneq_index = pmu->doneq_index;
|
|
|
+ addressLow = pmu->done_qbuffer[doneq_index &
|
|
|
+ 0xFFF].addressLow;
|
|
|
+ ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
|
|
|
+ arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
|
|
|
+ + ccb_cdb_phy);
|
|
|
+ ccb = container_of(arcmsr_cdb,
|
|
|
+ struct CommandControlBlock, arcmsr_cdb);
|
|
|
+ error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
|
|
|
+ ? true : false;
|
|
|
+ arcmsr_drain_donequeue(acb, ccb, error);
|
|
|
+ writel(doneq_index, pmu->outboundlist_read_pointer);
|
|
|
+ } while ((doneq_index & 0xFFF) !=
|
|
|
+ (outbound_write_pointer & 0xFFF));
|
|
|
+ }
|
|
|
+ writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
|
|
|
+ pmu->outboundlist_interrupt_cause);
|
|
|
+ readl(pmu->outboundlist_interrupt_cause);
|
|
|
+ spin_unlock_irqrestore(&acb->doneq_lock, flags);
|
|
|
+}
|
|
|
+
|
|
|
/*
|
|
|
**********************************************************************************
|
|
|
** Handle a message interrupt
|
|
|
@@ -1546,14 +2024,14 @@ static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
|
|
|
** We want this in order to compare the drivemap so that we can detect newly-attached drives.
|
|
|
**********************************************************************************
|
|
|
*/
|
|
|
-static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
- struct MessageUnit_A *reg = acb->pmuA;
|
|
|
+ struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
/*clear interrupt and message state*/
|
|
|
writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus);
|
|
|
schedule_work(&acb->arcmsr_do_message_isr_bh);
|
|
|
}
|
|
|
-static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
|
|
|
@@ -1570,114 +2048,142 @@ static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb)
|
|
|
** We want this in order to compare the drivemap so that we can detect newly-attached drives.
|
|
|
**********************************************************************************
|
|
|
*/
|
|
|
-static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
- struct MessageUnit_C *reg = acb->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
/*clear interrupt and message state*/
|
|
|
writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);
|
|
|
schedule_work(&acb->arcmsr_do_message_isr_bh);
|
|
|
}
|
|
|
|
|
|
-static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
|
|
|
+{
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+
|
|
|
+ writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
|
|
|
+ readl(reg->outbound_doorbell);
|
|
|
+ schedule_work(&acb->arcmsr_do_message_isr_bh);
|
|
|
+}
|
|
|
+
|
|
|
+static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
uint32_t outbound_intstatus;
|
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
outbound_intstatus = readl(®->outbound_intstatus) &
|
|
|
acb->outbound_int_enable;
|
|
|
- if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
|
|
|
- return 1;
|
|
|
- }
|
|
|
- writel(outbound_intstatus, ®->outbound_intstatus);
|
|
|
- if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
|
|
|
- arcmsr_hba_doorbell_isr(acb);
|
|
|
- }
|
|
|
- if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
|
|
|
- arcmsr_hba_postqueue_isr(acb);
|
|
|
- }
|
|
|
- if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
|
|
|
- /* messenger of "driver to iop commands" */
|
|
|
- arcmsr_hba_message_isr(acb);
|
|
|
- }
|
|
|
- return 0;
|
|
|
+ if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
|
|
|
+ return IRQ_NONE;
|
|
|
+ do {
|
|
|
+ writel(outbound_intstatus, ®->outbound_intstatus);
|
|
|
+ if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
|
|
|
+ arcmsr_hbaA_doorbell_isr(acb);
|
|
|
+ if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
|
|
|
+ arcmsr_hbaA_postqueue_isr(acb);
|
|
|
+ if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
|
|
|
+ arcmsr_hbaA_message_isr(acb);
|
|
|
+ outbound_intstatus = readl(®->outbound_intstatus) &
|
|
|
+ acb->outbound_int_enable;
|
|
|
+ } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
|
|
|
+ | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
|
|
|
+ | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
|
|
|
+ return IRQ_HANDLED;
|
|
|
}
|
|
|
|
|
|
-static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
|
|
|
+static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
uint32_t outbound_doorbell;
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
outbound_doorbell = readl(reg->iop2drv_doorbell) &
|
|
|
acb->outbound_int_enable;
|
|
|
if (!outbound_doorbell)
|
|
|
- return 1;
|
|
|
-
|
|
|
- writel(~outbound_doorbell, reg->iop2drv_doorbell);
|
|
|
- /*in case the last action of doorbell interrupt clearance is cached,
|
|
|
- this action can push HW to write down the clear bit*/
|
|
|
- readl(reg->iop2drv_doorbell);
|
|
|
- writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
|
|
|
- if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
|
|
|
- arcmsr_iop2drv_data_wrote_handle(acb);
|
|
|
- }
|
|
|
- if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
|
|
|
- arcmsr_iop2drv_data_read_handle(acb);
|
|
|
- }
|
|
|
- if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
|
|
|
- arcmsr_hbb_postqueue_isr(acb);
|
|
|
- }
|
|
|
- if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
|
|
|
- /* messenger of "driver to iop commands" */
|
|
|
- arcmsr_hbb_message_isr(acb);
|
|
|
- }
|
|
|
- return 0;
|
|
|
+ return IRQ_NONE;
|
|
|
+ do {
|
|
|
+ writel(~outbound_doorbell, reg->iop2drv_doorbell);
|
|
|
+ writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
|
|
|
+ if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
|
|
|
+ arcmsr_iop2drv_data_wrote_handle(acb);
|
|
|
+ if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
|
|
|
+ arcmsr_iop2drv_data_read_handle(acb);
|
|
|
+ if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
|
|
|
+ arcmsr_hbaB_postqueue_isr(acb);
|
|
|
+ if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
|
|
|
+ arcmsr_hbaB_message_isr(acb);
|
|
|
+ outbound_doorbell = readl(reg->iop2drv_doorbell) &
|
|
|
+ acb->outbound_int_enable;
|
|
|
+ } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
|
|
|
+ | ARCMSR_IOP2DRV_DATA_READ_OK
|
|
|
+ | ARCMSR_IOP2DRV_CDB_DONE
|
|
|
+ | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
|
|
|
+ return IRQ_HANDLED;
|
|
|
}
|
|
|
|
|
|
-static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB)
|
|
|
+static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
|
|
|
{
|
|
|
uint32_t host_interrupt_status;
|
|
|
- struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
|
|
|
/*
|
|
|
*********************************************
|
|
|
** check outbound intstatus
|
|
|
*********************************************
|
|
|
*/
|
|
|
- host_interrupt_status = readl(&phbcmu->host_int_status);
|
|
|
- if (!host_interrupt_status) {
|
|
|
- /*it must be share irq*/
|
|
|
- return 1;
|
|
|
- }
|
|
|
- /* MU ioctl transfer doorbell interrupts*/
|
|
|
- if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) {
|
|
|
- arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */
|
|
|
- }
|
|
|
- /* MU post queue interrupts*/
|
|
|
- if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
|
|
|
- arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */
|
|
|
- }
|
|
|
- return 0;
|
|
|
+ host_interrupt_status = readl(&phbcmu->host_int_status) &
|
|
|
+ (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
|
|
|
+ ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
|
|
|
+ if (!host_interrupt_status)
|
|
|
+ return IRQ_NONE;
|
|
|
+ do {
|
|
|
+ if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
|
|
|
+ arcmsr_hbaC_doorbell_isr(pACB);
|
|
|
+ /* MU post queue interrupts*/
|
|
|
+ if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
|
|
|
+ arcmsr_hbaC_postqueue_isr(pACB);
|
|
|
+ host_interrupt_status = readl(&phbcmu->host_int_status);
|
|
|
+ } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
|
|
|
+ ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
|
|
|
+ return IRQ_HANDLED;
|
|
|
+}
|
|
|
+
|
|
|
+static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
|
|
|
+{
|
|
|
+ u32 host_interrupt_status;
|
|
|
+ struct MessageUnit_D *pmu = pACB->pmuD;
|
|
|
+
|
|
|
+ host_interrupt_status = readl(pmu->host_int_status) &
|
|
|
+ (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
|
|
|
+ if (!host_interrupt_status)
|
|
|
+ return IRQ_NONE;
|
|
|
+ do {
|
|
|
+ /* MU post queue interrupts*/
|
|
|
+ if (host_interrupt_status &
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
|
|
|
+ arcmsr_hbaD_postqueue_isr(pACB);
|
|
|
+ if (host_interrupt_status &
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
|
|
|
+ arcmsr_hbaD_doorbell_isr(pACB);
|
|
|
+ host_interrupt_status = readl(pmu->host_int_status);
|
|
|
+ } while (host_interrupt_status &
|
|
|
+ (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
|
|
|
+ return IRQ_HANDLED;
|
|
|
}
|
|
|
+
|
|
|
static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
switch (acb->adapter_type) {
|
|
|
- case ACB_ADAPTER_TYPE_A: {
|
|
|
- if (arcmsr_handle_hba_isr(acb)) {
|
|
|
- return IRQ_NONE;
|
|
|
- }
|
|
|
- }
|
|
|
+ case ACB_ADAPTER_TYPE_A:
|
|
|
+ return arcmsr_hbaA_handle_isr(acb);
|
|
|
break;
|
|
|
-
|
|
|
- case ACB_ADAPTER_TYPE_B: {
|
|
|
- if (arcmsr_handle_hbb_isr(acb)) {
|
|
|
- return IRQ_NONE;
|
|
|
- }
|
|
|
- }
|
|
|
+ case ACB_ADAPTER_TYPE_B:
|
|
|
+ return arcmsr_hbaB_handle_isr(acb);
|
|
|
break;
|
|
|
- case ACB_ADAPTER_TYPE_C: {
|
|
|
- if (arcmsr_handle_hbc_isr(acb)) {
|
|
|
- return IRQ_NONE;
|
|
|
- }
|
|
|
- }
|
|
|
+ case ACB_ADAPTER_TYPE_C:
|
|
|
+ return arcmsr_hbaC_handle_isr(acb);
|
|
|
+ case ACB_ADAPTER_TYPE_D:
|
|
|
+ return arcmsr_hbaD_handle_isr(acb);
|
|
|
+ default:
|
|
|
+ return IRQ_NONE;
|
|
|
}
|
|
|
- return IRQ_HANDLED;
|
|
|
}
|
|
|
|
|
|
static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
|
|
|
@@ -1695,296 +2201,273 @@ static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
|
|
|
+
|
|
|
+void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
- int32_t wqbuf_firstindex, wqbuf_lastindex;
|
|
|
- uint8_t *pQbuffer;
|
|
|
- struct QBUFFER __iomem *pwbuffer;
|
|
|
- uint8_t __iomem *iop_data;
|
|
|
- int32_t allxfer_len = 0;
|
|
|
- pwbuffer = arcmsr_get_iop_wqbuffer(acb);
|
|
|
- iop_data = (uint8_t __iomem *)pwbuffer->data;
|
|
|
- if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
|
|
|
- acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
|
|
|
- wqbuf_firstindex = acb->wqbuf_firstindex;
|
|
|
- wqbuf_lastindex = acb->wqbuf_lastindex;
|
|
|
- while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
|
|
|
- pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
|
|
|
- memcpy(iop_data, pQbuffer, 1);
|
|
|
- wqbuf_firstindex++;
|
|
|
- wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
|
|
|
- iop_data++;
|
|
|
- allxfer_len++;
|
|
|
+ uint32_t i;
|
|
|
+
|
|
|
+ if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
|
|
+ for (i = 0; i < 15; i++) {
|
|
|
+ if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
|
|
+ acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
|
|
|
+ acb->rqbuf_getIndex = 0;
|
|
|
+ acb->rqbuf_putIndex = 0;
|
|
|
+ arcmsr_iop_message_read(acb);
|
|
|
+ mdelay(30);
|
|
|
+ } else if (acb->rqbuf_getIndex !=
|
|
|
+ acb->rqbuf_putIndex) {
|
|
|
+ acb->rqbuf_getIndex = 0;
|
|
|
+ acb->rqbuf_putIndex = 0;
|
|
|
+ mdelay(30);
|
|
|
+ } else
|
|
|
+ break;
|
|
|
}
|
|
|
- acb->wqbuf_firstindex = wqbuf_firstindex;
|
|
|
- pwbuffer->data_len = allxfer_len;
|
|
|
- arcmsr_iop_message_wrote(acb);
|
|
|
}
|
|
|
}
|
|
|
|
|
|
static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
|
|
|
- struct scsi_cmnd *cmd)
|
|
|
+ struct scsi_cmnd *cmd)
|
|
|
{
|
|
|
- struct CMD_MESSAGE_FIELD *pcmdmessagefld;
|
|
|
- int retvalue = 0, transfer_len = 0;
|
|
|
char *buffer;
|
|
|
+ unsigned short use_sg;
|
|
|
+ int retvalue = 0, transfer_len = 0;
|
|
|
+ unsigned long flags;
|
|
|
+ struct CMD_MESSAGE_FIELD *pcmdmessagefld;
|
|
|
+ uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
|
|
|
+ (uint32_t)cmd->cmnd[6] << 16 |
|
|
|
+ (uint32_t)cmd->cmnd[7] << 8 |
|
|
|
+ (uint32_t)cmd->cmnd[8];
|
|
|
struct scatterlist *sg;
|
|
|
- uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
|
|
|
- (uint32_t ) cmd->cmnd[6] << 16 |
|
|
|
- (uint32_t ) cmd->cmnd[7] << 8 |
|
|
|
- (uint32_t ) cmd->cmnd[8];
|
|
|
- /* 4 bytes: Areca io control code */
|
|
|
+
|
|
|
+ use_sg = scsi_sg_count(cmd);
|
|
|
sg = scsi_sglist(cmd);
|
|
|
buffer = kmap_atomic(sg_page(sg)) + sg->offset;
|
|
|
- if (scsi_sg_count(cmd) > 1) {
|
|
|
+ if (use_sg > 1) {
|
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
|
goto message_out;
|
|
|
}
|
|
|
transfer_len += sg->length;
|
|
|
-
|
|
|
if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
|
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
|
+ pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
|
|
|
goto message_out;
|
|
|
}
|
|
|
- pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
|
|
|
- switch(controlcode) {
|
|
|
-
|
|
|
+ pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
|
|
|
+ switch (controlcode) {
|
|
|
case ARCMSR_MESSAGE_READ_RQBUFFER: {
|
|
|
unsigned char *ver_addr;
|
|
|
- uint8_t *pQbuffer, *ptmpQbuffer;
|
|
|
- int32_t allxfer_len = 0;
|
|
|
-
|
|
|
- ver_addr = kmalloc(1032, GFP_ATOMIC);
|
|
|
+ uint8_t *ptmpQbuffer;
|
|
|
+ uint32_t allxfer_len = 0;
|
|
|
+ ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
|
|
|
if (!ver_addr) {
|
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
|
+ pr_info("%s: memory not enough!\n", __func__);
|
|
|
goto message_out;
|
|
|
}
|
|
|
-
|
|
|
ptmpQbuffer = ver_addr;
|
|
|
- while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
|
|
|
- && (allxfer_len < 1031)) {
|
|
|
- pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
|
|
|
- memcpy(ptmpQbuffer, pQbuffer, 1);
|
|
|
- acb->rqbuf_firstindex++;
|
|
|
- acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
|
|
|
- ptmpQbuffer++;
|
|
|
- allxfer_len++;
|
|
|
+ spin_lock_irqsave(&acb->rqbuffer_lock, flags);
|
|
|
+ if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
|
|
|
+ unsigned int tail = acb->rqbuf_getIndex;
|
|
|
+ unsigned int head = acb->rqbuf_putIndex;
|
|
|
+ unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
|
|
|
+
|
|
|
+ allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
|
|
|
+ if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
|
|
|
+ allxfer_len = ARCMSR_API_DATA_BUFLEN;
|
|
|
+
|
|
|
+ if (allxfer_len <= cnt_to_end)
|
|
|
+ memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
|
|
|
+ else {
|
|
|
+ memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
|
|
|
+ memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
|
|
|
+ }
|
|
|
+ acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
|
|
|
}
|
|
|
+ memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
|
|
|
+ allxfer_len);
|
|
|
if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
|
|
-
|
|
|
struct QBUFFER __iomem *prbuffer;
|
|
|
- uint8_t __iomem *iop_data;
|
|
|
- int32_t iop_len;
|
|
|
-
|
|
|
acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
|
|
|
prbuffer = arcmsr_get_iop_rqbuffer(acb);
|
|
|
- iop_data = prbuffer->data;
|
|
|
- iop_len = readl(&prbuffer->data_len);
|
|
|
- while (iop_len > 0) {
|
|
|
- acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
|
|
|
- acb->rqbuf_lastindex++;
|
|
|
- acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
|
|
|
- iop_data++;
|
|
|
- iop_len--;
|
|
|
- }
|
|
|
- arcmsr_iop_message_read(acb);
|
|
|
- }
|
|
|
- memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
|
|
|
- pcmdmessagefld->cmdmessage.Length = allxfer_len;
|
|
|
- if(acb->fw_flag == FW_DEADLOCK) {
|
|
|
- pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
- }else{
|
|
|
- pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
+ if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
|
|
|
+ acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
|
|
|
}
|
|
|
+ spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
|
|
|
kfree(ver_addr);
|
|
|
- }
|
|
|
+ pcmdmessagefld->cmdmessage.Length = allxfer_len;
|
|
|
+ if (acb->fw_flag == FW_DEADLOCK)
|
|
|
+ pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
+ else
|
|
|
+ pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
break;
|
|
|
-
|
|
|
+ }
|
|
|
case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
|
|
|
unsigned char *ver_addr;
|
|
|
- int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
|
|
|
+ int32_t user_len, cnt2end;
|
|
|
uint8_t *pQbuffer, *ptmpuserbuffer;
|
|
|
-
|
|
|
- ver_addr = kmalloc(1032, GFP_ATOMIC);
|
|
|
+ ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
|
|
|
if (!ver_addr) {
|
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
|
goto message_out;
|
|
|
}
|
|
|
- if(acb->fw_flag == FW_DEADLOCK) {
|
|
|
- pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
- }else{
|
|
|
- pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
- }
|
|
|
ptmpuserbuffer = ver_addr;
|
|
|
user_len = pcmdmessagefld->cmdmessage.Length;
|
|
|
- memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
|
|
|
- wqbuf_lastindex = acb->wqbuf_lastindex;
|
|
|
- wqbuf_firstindex = acb->wqbuf_firstindex;
|
|
|
- if (wqbuf_lastindex != wqbuf_firstindex) {
|
|
|
+ memcpy(ptmpuserbuffer,
|
|
|
+ pcmdmessagefld->messagedatabuffer, user_len);
|
|
|
+ spin_lock_irqsave(&acb->wqbuffer_lock, flags);
|
|
|
+ if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
|
|
|
struct SENSE_DATA *sensebuffer =
|
|
|
(struct SENSE_DATA *)cmd->sense_buffer;
|
|
|
- arcmsr_post_ioctldata2iop(acb);
|
|
|
+ arcmsr_write_ioctldata2iop(acb);
|
|
|
/* has error report sensedata */
|
|
|
- sensebuffer->ErrorCode = 0x70;
|
|
|
+ sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
|
|
|
sensebuffer->SenseKey = ILLEGAL_REQUEST;
|
|
|
sensebuffer->AdditionalSenseLength = 0x0A;
|
|
|
sensebuffer->AdditionalSenseCode = 0x20;
|
|
|
sensebuffer->Valid = 1;
|
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
|
} else {
|
|
|
- my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
|
|
|
- &(ARCMSR_MAX_QBUFFER - 1);
|
|
|
- if (my_empty_len >= user_len) {
|
|
|
- while (user_len > 0) {
|
|
|
- pQbuffer =
|
|
|
- &acb->wqbuffer[acb->wqbuf_lastindex];
|
|
|
- memcpy(pQbuffer, ptmpuserbuffer, 1);
|
|
|
- acb->wqbuf_lastindex++;
|
|
|
- acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
|
|
|
- ptmpuserbuffer++;
|
|
|
- user_len--;
|
|
|
- }
|
|
|
- if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
|
|
|
- acb->acb_flags &=
|
|
|
- ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
|
|
|
- arcmsr_post_ioctldata2iop(acb);
|
|
|
- }
|
|
|
- } else {
|
|
|
- /* has error report sensedata */
|
|
|
- struct SENSE_DATA *sensebuffer =
|
|
|
- (struct SENSE_DATA *)cmd->sense_buffer;
|
|
|
- sensebuffer->ErrorCode = 0x70;
|
|
|
- sensebuffer->SenseKey = ILLEGAL_REQUEST;
|
|
|
- sensebuffer->AdditionalSenseLength = 0x0A;
|
|
|
- sensebuffer->AdditionalSenseCode = 0x20;
|
|
|
- sensebuffer->Valid = 1;
|
|
|
- retvalue = ARCMSR_MESSAGE_FAIL;
|
|
|
+ pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
|
|
|
+ cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
|
|
|
+ if (user_len > cnt2end) {
|
|
|
+ memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
|
|
|
+ ptmpuserbuffer += cnt2end;
|
|
|
+ user_len -= cnt2end;
|
|
|
+ acb->wqbuf_putIndex = 0;
|
|
|
+ pQbuffer = acb->wqbuffer;
|
|
|
}
|
|
|
+ memcpy(pQbuffer, ptmpuserbuffer, user_len);
|
|
|
+ acb->wqbuf_putIndex += user_len;
|
|
|
+ acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
|
|
|
+ if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
|
|
|
+ acb->acb_flags &=
|
|
|
+ ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
|
|
|
+ arcmsr_write_ioctldata2iop(acb);
|
|
|
}
|
|
|
- kfree(ver_addr);
|
|
|
}
|
|
|
+ spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
|
|
|
+ kfree(ver_addr);
|
|
|
+ if (acb->fw_flag == FW_DEADLOCK)
|
|
|
+ pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
+ else
|
|
|
+ pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
break;
|
|
|
-
|
|
|
+ }
|
|
|
case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
|
|
|
uint8_t *pQbuffer = acb->rqbuffer;
|
|
|
- if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
|
|
- acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
|
|
|
- arcmsr_iop_message_read(acb);
|
|
|
- }
|
|
|
+
|
|
|
+ arcmsr_clear_iop2drv_rqueue_buffer(acb);
|
|
|
+ spin_lock_irqsave(&acb->rqbuffer_lock, flags);
|
|
|
acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
|
|
|
- acb->rqbuf_firstindex = 0;
|
|
|
- acb->rqbuf_lastindex = 0;
|
|
|
+ acb->rqbuf_getIndex = 0;
|
|
|
+ acb->rqbuf_putIndex = 0;
|
|
|
memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
|
|
|
- if(acb->fw_flag == FW_DEADLOCK) {
|
|
|
+ spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
|
|
|
+ if (acb->fw_flag == FW_DEADLOCK)
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
- }else{
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
+ else
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
- }
|
|
|
- }
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
break;
|
|
|
-
|
|
|
+ }
|
|
|
case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
|
|
|
uint8_t *pQbuffer = acb->wqbuffer;
|
|
|
- if(acb->fw_flag == FW_DEADLOCK) {
|
|
|
+ spin_lock_irqsave(&acb->wqbuffer_lock, flags);
|
|
|
+ acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
|
|
|
+ ACB_F_MESSAGE_WQBUFFER_READED);
|
|
|
+ acb->wqbuf_getIndex = 0;
|
|
|
+ acb->wqbuf_putIndex = 0;
|
|
|
+ memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
|
|
|
+ spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
|
|
|
+ if (acb->fw_flag == FW_DEADLOCK)
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
- }else{
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
+ else
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
- }
|
|
|
-
|
|
|
- if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
|
|
- acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
|
|
|
- arcmsr_iop_message_read(acb);
|
|
|
- }
|
|
|
- acb->acb_flags |=
|
|
|
- (ACB_F_MESSAGE_WQBUFFER_CLEARED |
|
|
|
- ACB_F_MESSAGE_WQBUFFER_READED);
|
|
|
- acb->wqbuf_firstindex = 0;
|
|
|
- acb->wqbuf_lastindex = 0;
|
|
|
- memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
|
|
|
- }
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
break;
|
|
|
-
|
|
|
+ }
|
|
|
case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
|
|
|
uint8_t *pQbuffer;
|
|
|
-
|
|
|
- if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
|
|
|
- acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
|
|
|
- arcmsr_iop_message_read(acb);
|
|
|
- }
|
|
|
- acb->acb_flags |=
|
|
|
- (ACB_F_MESSAGE_WQBUFFER_CLEARED
|
|
|
- | ACB_F_MESSAGE_RQBUFFER_CLEARED
|
|
|
- | ACB_F_MESSAGE_WQBUFFER_READED);
|
|
|
- acb->rqbuf_firstindex = 0;
|
|
|
- acb->rqbuf_lastindex = 0;
|
|
|
- acb->wqbuf_firstindex = 0;
|
|
|
- acb->wqbuf_lastindex = 0;
|
|
|
+ arcmsr_clear_iop2drv_rqueue_buffer(acb);
|
|
|
+ spin_lock_irqsave(&acb->rqbuffer_lock, flags);
|
|
|
+ acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
|
|
|
+ acb->rqbuf_getIndex = 0;
|
|
|
+ acb->rqbuf_putIndex = 0;
|
|
|
pQbuffer = acb->rqbuffer;
|
|
|
memset(pQbuffer, 0, sizeof(struct QBUFFER));
|
|
|
+ spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
|
|
|
+ spin_lock_irqsave(&acb->wqbuffer_lock, flags);
|
|
|
+ acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
|
|
|
+ ACB_F_MESSAGE_WQBUFFER_READED);
|
|
|
+ acb->wqbuf_getIndex = 0;
|
|
|
+ acb->wqbuf_putIndex = 0;
|
|
|
pQbuffer = acb->wqbuffer;
|
|
|
memset(pQbuffer, 0, sizeof(struct QBUFFER));
|
|
|
- if(acb->fw_flag == FW_DEADLOCK) {
|
|
|
+ spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
|
|
|
+ if (acb->fw_flag == FW_DEADLOCK)
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
- }else{
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
+ else
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
- }
|
|
|
- }
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
break;
|
|
|
-
|
|
|
+ }
|
|
|
case ARCMSR_MESSAGE_RETURN_CODE_3F: {
|
|
|
- if(acb->fw_flag == FW_DEADLOCK) {
|
|
|
+ if (acb->fw_flag == FW_DEADLOCK)
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
- }else{
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
+ else
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_3F;
|
|
|
- }
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_3F;
|
|
|
break;
|
|
|
- }
|
|
|
+ }
|
|
|
case ARCMSR_MESSAGE_SAY_HELLO: {
|
|
|
int8_t *hello_string = "Hello! I am ARCMSR";
|
|
|
- if(acb->fw_flag == FW_DEADLOCK) {
|
|
|
+ if (acb->fw_flag == FW_DEADLOCK)
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
- }else{
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
+ else
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
- }
|
|
|
- memcpy(pcmdmessagefld->messagedatabuffer, hello_string
|
|
|
- , (int16_t)strlen(hello_string));
|
|
|
- }
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
+ memcpy(pcmdmessagefld->messagedatabuffer,
|
|
|
+ hello_string, (int16_t)strlen(hello_string));
|
|
|
break;
|
|
|
-
|
|
|
- case ARCMSR_MESSAGE_SAY_GOODBYE:
|
|
|
- if(acb->fw_flag == FW_DEADLOCK) {
|
|
|
+ }
|
|
|
+ case ARCMSR_MESSAGE_SAY_GOODBYE: {
|
|
|
+ if (acb->fw_flag == FW_DEADLOCK)
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
- }
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
+ else
|
|
|
+ pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
arcmsr_iop_parking(acb);
|
|
|
break;
|
|
|
-
|
|
|
- case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
|
|
|
- if(acb->fw_flag == FW_DEADLOCK) {
|
|
|
+ }
|
|
|
+ case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
|
|
|
+ if (acb->fw_flag == FW_DEADLOCK)
|
|
|
pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
- ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
- }
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
|
|
|
+ else
|
|
|
+ pcmdmessagefld->cmdmessage.ReturnCode =
|
|
|
+ ARCMSR_MESSAGE_RETURNCODE_OK;
|
|
|
arcmsr_flush_adapter_cache(acb);
|
|
|
break;
|
|
|
-
|
|
|
+ }
|
|
|
default:
|
|
|
retvalue = ARCMSR_MESSAGE_FAIL;
|
|
|
+ pr_info("%s: unknown controlcode!\n", __func__);
|
|
|
+ }
|
|
|
+message_out:
|
|
|
+ if (use_sg) {
|
|
|
+ struct scatterlist *sg = scsi_sglist(cmd);
|
|
|
+ kunmap_atomic(buffer - sg->offset);
|
|
|
}
|
|
|
- message_out:
|
|
|
- sg = scsi_sglist(cmd);
|
|
|
- kunmap_atomic(buffer - sg->offset);
|
|
|
return retvalue;
|
|
|
}
|
|
|
|
|
|
@@ -1999,7 +2482,7 @@ static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock
|
|
|
list_del_init(&ccb->list);
|
|
|
}else{
|
|
|
spin_unlock_irqrestore(&acb->ccblist_lock, flags);
|
|
|
- return 0;
|
|
|
+ return NULL;
|
|
|
}
|
|
|
spin_unlock_irqrestore(&acb->ccblist_lock, flags);
|
|
|
return ccb;
|
|
|
@@ -2079,9 +2562,6 @@ static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
|
|
|
arcmsr_handle_virtual_command(acb, cmd);
|
|
|
return 0;
|
|
|
}
|
|
|
- if (atomic_read(&acb->ccboutstandingcount) >=
|
|
|
- ARCMSR_MAX_OUTSTANDING_CMD)
|
|
|
- return SCSI_MLQUEUE_HOST_BUSY;
|
|
|
ccb = arcmsr_get_freeccb(acb);
|
|
|
if (!ccb)
|
|
|
return SCSI_MLQUEUE_HOST_BUSY;
|
|
|
@@ -2096,7 +2576,7 @@ static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
|
|
|
|
|
|
static DEF_SCSI_QCMD(arcmsr_queue_command)
|
|
|
|
|
|
-static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
|
|
|
+static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
char *acb_firm_model = acb->firm_model;
|
|
|
@@ -2107,7 +2587,7 @@ static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
|
|
|
char __iomem *iop_device_map = (char __iomem *)(®->message_rwbuffer[21]);
|
|
|
int count;
|
|
|
writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0);
|
|
|
- if (!arcmsr_hba_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
|
|
|
miscellaneous data' timeout \n", acb->host->host_no);
|
|
|
return false;
|
|
|
@@ -2135,10 +2615,10 @@ static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
|
|
|
iop_device_map++;
|
|
|
count--;
|
|
|
}
|
|
|
- printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
|
|
|
+ pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
|
|
|
acb->host->host_no,
|
|
|
- acb->firm_version,
|
|
|
- acb->firm_model);
|
|
|
+ acb->firm_model,
|
|
|
+ acb->firm_version);
|
|
|
acb->signature = readl(®->message_rwbuffer[0]);
|
|
|
acb->firm_request_len = readl(®->message_rwbuffer[1]);
|
|
|
acb->firm_numbers_queue = readl(®->message_rwbuffer[2]);
|
|
|
@@ -2147,7 +2627,7 @@ static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
|
|
|
acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
|
|
|
return true;
|
|
|
}
|
|
|
-static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
|
|
|
+static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
struct pci_dev *pdev = acb->pdev;
|
|
|
@@ -2163,12 +2643,18 @@ static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
|
|
|
char __iomem *iop_device_map;
|
|
|
/*firm_version,21,84-99*/
|
|
|
int count;
|
|
|
- dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL);
|
|
|
+
|
|
|
+ acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_B), 32);
|
|
|
+ dma_coherent = dma_alloc_coherent(&pdev->dev, acb->roundup_ccbsize,
|
|
|
+ &dma_coherent_handle, GFP_KERNEL);
|
|
|
if (!dma_coherent){
|
|
|
- printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no);
|
|
|
+ printk(KERN_NOTICE
|
|
|
+ "arcmsr%d: dma_alloc_coherent got error for hbb mu\n",
|
|
|
+ acb->host->host_no);
|
|
|
return false;
|
|
|
}
|
|
|
- acb->dma_coherent_handle_hbb_mu = dma_coherent_handle;
|
|
|
+ acb->dma_coherent_handle2 = dma_coherent_handle;
|
|
|
+ acb->dma_coherent2 = dma_coherent;
|
|
|
reg = (struct MessageUnit_B *)dma_coherent;
|
|
|
acb->pmuB = reg;
|
|
|
reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL);
|
|
|
@@ -2183,7 +2669,7 @@ static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
|
|
|
iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); /*firm_version,21,84-99*/
|
|
|
|
|
|
writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
|
|
|
- if (!arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
|
|
|
miscellaneous data' timeout \n", acb->host->host_no);
|
|
|
return false;
|
|
|
@@ -2211,10 +2697,10 @@ static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
|
|
|
count--;
|
|
|
}
|
|
|
|
|
|
- printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
|
|
|
+ pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
|
|
|
acb->host->host_no,
|
|
|
- acb->firm_version,
|
|
|
- acb->firm_model);
|
|
|
+ acb->firm_model,
|
|
|
+ acb->firm_version);
|
|
|
|
|
|
acb->signature = readl(®->message_rwbuffer[1]);
|
|
|
/*firm_signature,1,00-03*/
|
|
|
@@ -2231,14 +2717,14 @@ static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
|
|
|
return true;
|
|
|
}
|
|
|
|
|
|
-static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB)
|
|
|
+static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
|
|
|
{
|
|
|
uint32_t intmask_org, Index, firmware_state = 0;
|
|
|
- struct MessageUnit_C *reg = pACB->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = pACB->pmuC;
|
|
|
char *acb_firm_model = pACB->firm_model;
|
|
|
char *acb_firm_version = pACB->firm_version;
|
|
|
- char *iop_firm_model = (char *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/
|
|
|
- char *iop_firm_version = (char *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/
|
|
|
+ char __iomem *iop_firm_model = (char __iomem *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/
|
|
|
+ char __iomem *iop_firm_version = (char __iomem *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/
|
|
|
int count;
|
|
|
/* disable all outbound interrupt */
|
|
|
intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */
|
|
|
@@ -2277,10 +2763,10 @@ static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB)
|
|
|
iop_firm_version++;
|
|
|
count--;
|
|
|
}
|
|
|
- printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
|
|
|
+ pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
|
|
|
pACB->host->host_no,
|
|
|
- pACB->firm_version,
|
|
|
- pACB->firm_model);
|
|
|
+ pACB->firm_model,
|
|
|
+ pACB->firm_version);
|
|
|
pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/
|
|
|
pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/
|
|
|
pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/
|
|
|
@@ -2289,17 +2775,166 @@ static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB)
|
|
|
/*all interrupt service will be enable at arcmsr_iop_init*/
|
|
|
return true;
|
|
|
}
|
|
|
+
|
|
|
+static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
|
|
|
+{
|
|
|
+ char *acb_firm_model = acb->firm_model;
|
|
|
+ char *acb_firm_version = acb->firm_version;
|
|
|
+ char *acb_device_map = acb->device_map;
|
|
|
+ char __iomem *iop_firm_model;
|
|
|
+ char __iomem *iop_firm_version;
|
|
|
+ char __iomem *iop_device_map;
|
|
|
+ u32 count;
|
|
|
+ struct MessageUnit_D *reg;
|
|
|
+ void *dma_coherent2;
|
|
|
+ dma_addr_t dma_coherent_handle2;
|
|
|
+ struct pci_dev *pdev = acb->pdev;
|
|
|
+
|
|
|
+ acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_D), 32);
|
|
|
+ dma_coherent2 = dma_alloc_coherent(&pdev->dev, acb->roundup_ccbsize,
|
|
|
+ &dma_coherent_handle2, GFP_KERNEL);
|
|
|
+ if (!dma_coherent2) {
|
|
|
+ pr_notice("DMA allocation failed...\n");
|
|
|
+ return false;
|
|
|
+ }
|
|
|
+ memset(dma_coherent2, 0, acb->roundup_ccbsize);
|
|
|
+ acb->dma_coherent_handle2 = dma_coherent_handle2;
|
|
|
+ acb->dma_coherent2 = dma_coherent2;
|
|
|
+ reg = (struct MessageUnit_D *)dma_coherent2;
|
|
|
+ acb->pmuD = reg;
|
|
|
+ reg->chip_id = acb->mem_base0 + ARCMSR_ARC1214_CHIP_ID;
|
|
|
+ reg->cpu_mem_config = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION;
|
|
|
+ reg->i2o_host_interrupt_mask = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK;
|
|
|
+ reg->sample_at_reset = acb->mem_base0 + ARCMSR_ARC1214_SAMPLE_RESET;
|
|
|
+ reg->reset_request = acb->mem_base0 + ARCMSR_ARC1214_RESET_REQUEST;
|
|
|
+ reg->host_int_status = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS;
|
|
|
+ reg->pcief0_int_enable = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE;
|
|
|
+ reg->inbound_msgaddr0 = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_INBOUND_MESSAGE0;
|
|
|
+ reg->inbound_msgaddr1 = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_INBOUND_MESSAGE1;
|
|
|
+ reg->outbound_msgaddr0 = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_MESSAGE0;
|
|
|
+ reg->outbound_msgaddr1 = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_MESSAGE1;
|
|
|
+ reg->inbound_doorbell = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_INBOUND_DOORBELL;
|
|
|
+ reg->outbound_doorbell = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_DOORBELL;
|
|
|
+ reg->outbound_doorbell_enable = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE;
|
|
|
+ reg->inboundlist_base_low = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW;
|
|
|
+ reg->inboundlist_base_high = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH;
|
|
|
+ reg->inboundlist_write_pointer = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER;
|
|
|
+ reg->outboundlist_base_low = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW;
|
|
|
+ reg->outboundlist_base_high = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH;
|
|
|
+ reg->outboundlist_copy_pointer = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER;
|
|
|
+ reg->outboundlist_read_pointer = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER;
|
|
|
+ reg->outboundlist_interrupt_cause = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE;
|
|
|
+ reg->outboundlist_interrupt_enable = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE;
|
|
|
+ reg->message_wbuffer = acb->mem_base0 + ARCMSR_ARC1214_MESSAGE_WBUFFER;
|
|
|
+ reg->message_rbuffer = acb->mem_base0 + ARCMSR_ARC1214_MESSAGE_RBUFFER;
|
|
|
+ reg->msgcode_rwbuffer = acb->mem_base0 +
|
|
|
+ ARCMSR_ARC1214_MESSAGE_RWBUFFER;
|
|
|
+ iop_firm_model = (char __iomem *)(®->msgcode_rwbuffer[15]);
|
|
|
+ iop_firm_version = (char __iomem *)(®->msgcode_rwbuffer[17]);
|
|
|
+ iop_device_map = (char __iomem *)(®->msgcode_rwbuffer[21]);
|
|
|
+ if (readl(acb->pmuD->outbound_doorbell) &
|
|
|
+ ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
|
|
|
+ writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
|
|
|
+ acb->pmuD->outbound_doorbell);/*clear interrupt*/
|
|
|
+ }
|
|
|
+ /* post "get config" instruction */
|
|
|
+ writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
|
|
|
+ /* wait message ready */
|
|
|
+ if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
|
|
|
+ pr_notice("arcmsr%d: wait get adapter firmware "
|
|
|
+ "miscellaneous data timeout\n", acb->host->host_no);
|
|
|
+ dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize,
|
|
|
+ acb->dma_coherent2, acb->dma_coherent_handle2);
|
|
|
+ return false;
|
|
|
+ }
|
|
|
+ count = 8;
|
|
|
+ while (count) {
|
|
|
+ *acb_firm_model = readb(iop_firm_model);
|
|
|
+ acb_firm_model++;
|
|
|
+ iop_firm_model++;
|
|
|
+ count--;
|
|
|
+ }
|
|
|
+ count = 16;
|
|
|
+ while (count) {
|
|
|
+ *acb_firm_version = readb(iop_firm_version);
|
|
|
+ acb_firm_version++;
|
|
|
+ iop_firm_version++;
|
|
|
+ count--;
|
|
|
+ }
|
|
|
+ count = 16;
|
|
|
+ while (count) {
|
|
|
+ *acb_device_map = readb(iop_device_map);
|
|
|
+ acb_device_map++;
|
|
|
+ iop_device_map++;
|
|
|
+ count--;
|
|
|
+ }
|
|
|
+ acb->signature = readl(®->msgcode_rwbuffer[1]);
|
|
|
+ /*firm_signature,1,00-03*/
|
|
|
+ acb->firm_request_len = readl(®->msgcode_rwbuffer[2]);
|
|
|
+ /*firm_request_len,1,04-07*/
|
|
|
+ acb->firm_numbers_queue = readl(®->msgcode_rwbuffer[3]);
|
|
|
+ /*firm_numbers_queue,2,08-11*/
|
|
|
+ acb->firm_sdram_size = readl(®->msgcode_rwbuffer[4]);
|
|
|
+ /*firm_sdram_size,3,12-15*/
|
|
|
+ acb->firm_hd_channels = readl(®->msgcode_rwbuffer[5]);
|
|
|
+ /*firm_hd_channels,4,16-19*/
|
|
|
+ acb->firm_cfg_version = readl(®->msgcode_rwbuffer[25]);
|
|
|
+ pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
|
|
|
+ acb->host->host_no,
|
|
|
+ acb->firm_model,
|
|
|
+ acb->firm_version);
|
|
|
+ return true;
|
|
|
+}
|
|
|
+
|
|
|
static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
- if (acb->adapter_type == ACB_ADAPTER_TYPE_A)
|
|
|
- return arcmsr_get_hba_config(acb);
|
|
|
- else if (acb->adapter_type == ACB_ADAPTER_TYPE_B)
|
|
|
- return arcmsr_get_hbb_config(acb);
|
|
|
+ bool rtn = false;
|
|
|
+
|
|
|
+ switch (acb->adapter_type) {
|
|
|
+ case ACB_ADAPTER_TYPE_A:
|
|
|
+ rtn = arcmsr_hbaA_get_config(acb);
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_B:
|
|
|
+ rtn = arcmsr_hbaB_get_config(acb);
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_C:
|
|
|
+ rtn = arcmsr_hbaC_get_config(acb);
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D:
|
|
|
+ rtn = arcmsr_hbaD_get_config(acb);
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ if (acb->firm_numbers_queue > ARCMSR_MAX_OUTSTANDING_CMD)
|
|
|
+ acb->maxOutstanding = ARCMSR_MAX_OUTSTANDING_CMD;
|
|
|
else
|
|
|
- return arcmsr_get_hbc_config(acb);
|
|
|
+ acb->maxOutstanding = acb->firm_numbers_queue - 1;
|
|
|
+ acb->host->can_queue = acb->maxOutstanding;
|
|
|
+ return rtn;
|
|
|
}
|
|
|
|
|
|
-static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
|
|
|
+static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
|
|
|
struct CommandControlBlock *poll_ccb)
|
|
|
{
|
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
@@ -2328,7 +2963,7 @@ static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
|
|
|
}
|
|
|
arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
|
|
|
ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
|
|
|
- poll_ccb_done = (ccb == poll_ccb) ? 1:0;
|
|
|
+ poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
|
|
|
if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
|
|
|
if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
|
|
|
printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
|
|
|
@@ -2355,7 +2990,7 @@ static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
|
|
|
return rtn;
|
|
|
}
|
|
|
|
|
|
-static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
|
|
|
+static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
|
|
|
struct CommandControlBlock *poll_ccb)
|
|
|
{
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
@@ -2371,7 +3006,8 @@ static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
|
|
|
writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
|
|
|
while(1){
|
|
|
index = reg->doneq_index;
|
|
|
- if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) {
|
|
|
+ flag_ccb = reg->done_qbuffer[index];
|
|
|
+ if (flag_ccb == 0) {
|
|
|
if (poll_ccb_done){
|
|
|
rtn = SUCCESS;
|
|
|
break;
|
|
|
@@ -2384,7 +3020,7 @@ static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
|
|
|
goto polling_hbb_ccb_retry;
|
|
|
}
|
|
|
}
|
|
|
- writel(0, ®->done_qbuffer[index]);
|
|
|
+ reg->done_qbuffer[index] = 0;
|
|
|
index++;
|
|
|
/*if last index number set it to 0 */
|
|
|
index %= ARCMSR_MAX_HBB_POSTQUEUE;
|
|
|
@@ -2392,7 +3028,7 @@ static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
|
|
|
/* check if command done with no error*/
|
|
|
arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
|
|
|
ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
|
|
|
- poll_ccb_done = (ccb == poll_ccb) ? 1:0;
|
|
|
+ poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
|
|
|
if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
|
|
|
if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
|
|
|
printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
|
|
|
@@ -2419,9 +3055,10 @@ static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
|
|
|
return rtn;
|
|
|
}
|
|
|
|
|
|
-static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb)
|
|
|
+static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
|
|
|
+ struct CommandControlBlock *poll_ccb)
|
|
|
{
|
|
|
- struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
uint32_t flag_ccb, ccb_cdb_phy;
|
|
|
struct ARCMSR_CDB *arcmsr_cdb;
|
|
|
bool error;
|
|
|
@@ -2448,7 +3085,7 @@ polling_hbc_ccb_retry:
|
|
|
ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
|
|
|
arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
|
|
|
pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
|
|
|
- poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0;
|
|
|
+ poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
|
|
|
/* check ifcommand done with no error*/
|
|
|
if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
|
|
|
if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
|
|
|
@@ -2475,6 +3112,81 @@ polling_hbc_ccb_retry:
|
|
|
}
|
|
|
return rtn;
|
|
|
}
|
|
|
+
|
|
|
+static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
|
|
|
+ struct CommandControlBlock *poll_ccb)
|
|
|
+{
|
|
|
+ bool error;
|
|
|
+ uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb, ccb_cdb_phy;
|
|
|
+ int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
|
|
|
+ unsigned long flags;
|
|
|
+ struct ARCMSR_CDB *arcmsr_cdb;
|
|
|
+ struct CommandControlBlock *pCCB;
|
|
|
+ struct MessageUnit_D *pmu = acb->pmuD;
|
|
|
+
|
|
|
+polling_hbaD_ccb_retry:
|
|
|
+ poll_count++;
|
|
|
+ while (1) {
|
|
|
+ spin_lock_irqsave(&acb->doneq_lock, flags);
|
|
|
+ outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
|
|
|
+ doneq_index = pmu->doneq_index;
|
|
|
+ if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
|
|
|
+ spin_unlock_irqrestore(&acb->doneq_lock, flags);
|
|
|
+ if (poll_ccb_done) {
|
|
|
+ rtn = SUCCESS;
|
|
|
+ break;
|
|
|
+ } else {
|
|
|
+ msleep(25);
|
|
|
+ if (poll_count > 40) {
|
|
|
+ rtn = FAILED;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ goto polling_hbaD_ccb_retry;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ toggle = doneq_index & 0x4000;
|
|
|
+ index_stripped = (doneq_index & 0xFFF) + 1;
|
|
|
+ index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
|
|
|
+ pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
|
|
|
+ ((toggle ^ 0x4000) + 1);
|
|
|
+ doneq_index = pmu->doneq_index;
|
|
|
+ spin_unlock_irqrestore(&acb->doneq_lock, flags);
|
|
|
+ flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
|
|
|
+ ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
|
|
|
+ arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
|
|
|
+ ccb_cdb_phy);
|
|
|
+ pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
|
|
|
+ arcmsr_cdb);
|
|
|
+ poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
|
|
|
+ if ((pCCB->acb != acb) ||
|
|
|
+ (pCCB->startdone != ARCMSR_CCB_START)) {
|
|
|
+ if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
|
|
|
+ pr_notice("arcmsr%d: scsi id = %d "
|
|
|
+ "lun = %d ccb = '0x%p' poll command "
|
|
|
+ "abort successfully\n"
|
|
|
+ , acb->host->host_no
|
|
|
+ , pCCB->pcmd->device->id
|
|
|
+ , (u32)pCCB->pcmd->device->lun
|
|
|
+ , pCCB);
|
|
|
+ pCCB->pcmd->result = DID_ABORT << 16;
|
|
|
+ arcmsr_ccb_complete(pCCB);
|
|
|
+ continue;
|
|
|
+ }
|
|
|
+ pr_notice("arcmsr%d: polling an illegal "
|
|
|
+ "ccb command done ccb = '0x%p' "
|
|
|
+ "ccboutstandingcount = %d\n"
|
|
|
+ , acb->host->host_no
|
|
|
+ , pCCB
|
|
|
+ , atomic_read(&acb->ccboutstandingcount));
|
|
|
+ continue;
|
|
|
+ }
|
|
|
+ error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
|
|
|
+ ? true : false;
|
|
|
+ arcmsr_report_ccb_state(acb, pCCB, error);
|
|
|
+ }
|
|
|
+ return rtn;
|
|
|
+}
|
|
|
+
|
|
|
static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
|
|
|
struct CommandControlBlock *poll_ccb)
|
|
|
{
|
|
|
@@ -2482,17 +3194,21 @@ static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
|
|
|
switch (acb->adapter_type) {
|
|
|
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
|
- rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb);
|
|
|
+ rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
|
- rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb);
|
|
|
+ rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb);
|
|
|
+ rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
|
|
|
}
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D:
|
|
|
+ rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
|
|
|
+ break;
|
|
|
}
|
|
|
return rtn;
|
|
|
}
|
|
|
@@ -2500,6 +3216,7 @@ static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
|
|
|
static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
|
|
|
+ dma_addr_t dma_coherent_handle;
|
|
|
|
|
|
/*
|
|
|
********************************************************************
|
|
|
@@ -2507,8 +3224,17 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
|
|
|
** if freeccb.HighPart is not zero
|
|
|
********************************************************************
|
|
|
*/
|
|
|
- cdb_phyaddr = lower_32_bits(acb->dma_coherent_handle);
|
|
|
- cdb_phyaddr_hi32 = upper_32_bits(acb->dma_coherent_handle);
|
|
|
+ switch (acb->adapter_type) {
|
|
|
+ case ACB_ADAPTER_TYPE_B:
|
|
|
+ case ACB_ADAPTER_TYPE_D:
|
|
|
+ dma_coherent_handle = acb->dma_coherent_handle2;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ dma_coherent_handle = acb->dma_coherent_handle;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ cdb_phyaddr = lower_32_bits(dma_coherent_handle);
|
|
|
+ cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
|
|
|
acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
|
|
|
/*
|
|
|
***********************************************************************
|
|
|
@@ -2520,65 +3246,62 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
|
if (cdb_phyaddr_hi32 != 0) {
|
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
- uint32_t intmask_org;
|
|
|
- intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
|
writel(ARCMSR_SIGNATURE_SET_CONFIG, \
|
|
|
®->message_rwbuffer[0]);
|
|
|
writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]);
|
|
|
writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
|
|
|
®->inbound_msgaddr0);
|
|
|
- if (!arcmsr_hba_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
|
|
|
part physical address timeout\n",
|
|
|
acb->host->host_no);
|
|
|
return 1;
|
|
|
}
|
|
|
- arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
|
}
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
|
- unsigned long post_queue_phyaddr;
|
|
|
uint32_t __iomem *rwbuffer;
|
|
|
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
- uint32_t intmask_org;
|
|
|
- intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
|
reg->postq_index = 0;
|
|
|
reg->doneq_index = 0;
|
|
|
writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
|
|
|
- if (!arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
|
|
|
acb->host->host_no);
|
|
|
return 1;
|
|
|
}
|
|
|
- post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu;
|
|
|
rwbuffer = reg->message_rwbuffer;
|
|
|
/* driver "set config" signature */
|
|
|
writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
|
|
|
/* normal should be zero */
|
|
|
writel(cdb_phyaddr_hi32, rwbuffer++);
|
|
|
/* postQ size (256 + 8)*4 */
|
|
|
- writel(post_queue_phyaddr, rwbuffer++);
|
|
|
+ writel(cdb_phyaddr, rwbuffer++);
|
|
|
/* doneQ size (256 + 8)*4 */
|
|
|
- writel(post_queue_phyaddr + 1056, rwbuffer++);
|
|
|
+ writel(cdb_phyaddr + 1056, rwbuffer++);
|
|
|
/* ccb maxQ size must be --> [(256 + 8)*4]*/
|
|
|
writel(1056, rwbuffer);
|
|
|
|
|
|
writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
|
|
|
- if (!arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
|
|
|
timeout \n",acb->host->host_no);
|
|
|
return 1;
|
|
|
}
|
|
|
- arcmsr_hbb_enable_driver_mode(acb);
|
|
|
- arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
|
+ writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
|
|
|
+ if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
|
|
|
+ pr_err("arcmsr%d: can't set driver mode.\n",
|
|
|
+ acb->host->host_no);
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
if (cdb_phyaddr_hi32 != 0) {
|
|
|
- struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
|
|
|
printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
|
|
|
acb->adapter_index, cdb_phyaddr_hi32);
|
|
|
@@ -2586,13 +3309,34 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
|
|
|
writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]);
|
|
|
writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0);
|
|
|
writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell);
|
|
|
- if (!arcmsr_hbc_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
|
|
|
timeout \n", acb->host->host_no);
|
|
|
return 1;
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ uint32_t __iomem *rwbuffer;
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+ reg->postq_index = 0;
|
|
|
+ reg->doneq_index = 0;
|
|
|
+ rwbuffer = reg->msgcode_rwbuffer;
|
|
|
+ writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
|
|
|
+ writel(cdb_phyaddr_hi32, rwbuffer++);
|
|
|
+ writel(cdb_phyaddr, rwbuffer++);
|
|
|
+ writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
|
|
|
+ sizeof(struct InBound_SRB)), rwbuffer++);
|
|
|
+ writel(0x100, rwbuffer);
|
|
|
+ writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
|
|
|
+ if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
|
|
|
+ pr_notice("arcmsr%d: 'set command Q window' timeout\n",
|
|
|
+ acb->host->host_no);
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
return 0;
|
|
|
}
|
|
|
@@ -2619,15 +3363,24 @@ static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
do {
|
|
|
firmware_state = readl(®->outbound_msgaddr1);
|
|
|
} while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
|
|
|
}
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+ do {
|
|
|
+ firmware_state = readl(reg->outbound_msgaddr1);
|
|
|
+ } while ((firmware_state &
|
|
|
+ ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
|
|
|
@@ -2649,9 +3402,9 @@ static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb)
|
|
|
return;
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
- struct MessageUnit_B __iomem *reg = acb->pmuB;
|
|
|
+ struct MessageUnit_B *reg = acb->pmuB;
|
|
|
if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
|
|
|
mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
|
|
|
return;
|
|
|
@@ -2671,7 +3424,7 @@ static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb)
|
|
|
return;
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
|
|
|
@@ -2694,69 +3447,119 @@ static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb)
|
|
|
return;
|
|
|
}
|
|
|
|
|
|
+static void arcmsr_hbaD_request_device_map(struct AdapterControlBlock *acb)
|
|
|
+{
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+
|
|
|
+ if (unlikely(atomic_read(&acb->rq_map_token) == 0) ||
|
|
|
+ ((acb->acb_flags & ACB_F_BUS_RESET) != 0) ||
|
|
|
+ ((acb->acb_flags & ACB_F_ABORT) != 0)) {
|
|
|
+ mod_timer(&acb->eternal_timer,
|
|
|
+ jiffies + msecs_to_jiffies(6 * HZ));
|
|
|
+ } else {
|
|
|
+ acb->fw_flag = FW_NORMAL;
|
|
|
+ if (atomic_read(&acb->ante_token_value) ==
|
|
|
+ atomic_read(&acb->rq_map_token)) {
|
|
|
+ atomic_set(&acb->rq_map_token, 16);
|
|
|
+ }
|
|
|
+ atomic_set(&acb->ante_token_value,
|
|
|
+ atomic_read(&acb->rq_map_token));
|
|
|
+ if (atomic_dec_and_test(&acb->rq_map_token)) {
|
|
|
+ mod_timer(&acb->eternal_timer, jiffies +
|
|
|
+ msecs_to_jiffies(6 * HZ));
|
|
|
+ return;
|
|
|
+ }
|
|
|
+ writel(ARCMSR_INBOUND_MESG0_GET_CONFIG,
|
|
|
+ reg->inbound_msgaddr0);
|
|
|
+ mod_timer(&acb->eternal_timer, jiffies +
|
|
|
+ msecs_to_jiffies(6 * HZ));
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
static void arcmsr_request_device_map(unsigned long pacb)
|
|
|
{
|
|
|
struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb;
|
|
|
switch (acb->adapter_type) {
|
|
|
case ACB_ADAPTER_TYPE_A: {
|
|
|
- arcmsr_request_hba_device_map(acb);
|
|
|
+ arcmsr_hbaA_request_device_map(acb);
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_B: {
|
|
|
- arcmsr_request_hbb_device_map(acb);
|
|
|
+ arcmsr_hbaB_request_device_map(acb);
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- arcmsr_request_hbc_device_map(acb);
|
|
|
+ arcmsr_hbaC_request_device_map(acb);
|
|
|
}
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D:
|
|
|
+ arcmsr_hbaD_request_device_map(acb);
|
|
|
+ break;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_A __iomem *reg = acb->pmuA;
|
|
|
acb->acb_flags |= ACB_F_MSG_START_BGRB;
|
|
|
writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0);
|
|
|
- if (!arcmsr_hba_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
|
|
|
rebulid' timeout \n", acb->host->host_no);
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
|
|
|
+static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
acb->acb_flags |= ACB_F_MSG_START_BGRB;
|
|
|
writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
|
|
|
- if (!arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
|
|
|
rebulid' timeout \n",acb->host->host_no);
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB)
|
|
|
+static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
|
|
|
{
|
|
|
- struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
|
|
|
+ struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
|
|
|
pACB->acb_flags |= ACB_F_MSG_START_BGRB;
|
|
|
writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
|
|
|
writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
|
|
|
- if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
|
|
|
+ if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
|
|
|
printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
|
|
|
rebulid' timeout \n", pACB->host->host_no);
|
|
|
}
|
|
|
return;
|
|
|
}
|
|
|
+
|
|
|
+static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
|
|
|
+{
|
|
|
+ struct MessageUnit_D *pmu = pACB->pmuD;
|
|
|
+
|
|
|
+ pACB->acb_flags |= ACB_F_MSG_START_BGRB;
|
|
|
+ writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
|
|
|
+ if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
|
|
|
+ pr_notice("arcmsr%d: wait 'start adapter "
|
|
|
+ "background rebulid' timeout\n", pACB->host->host_no);
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
switch (acb->adapter_type) {
|
|
|
case ACB_ADAPTER_TYPE_A:
|
|
|
- arcmsr_start_hba_bgrb(acb);
|
|
|
+ arcmsr_hbaA_start_bgrb(acb);
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_B:
|
|
|
- arcmsr_start_hbb_bgrb(acb);
|
|
|
+ arcmsr_hbaB_start_bgrb(acb);
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C:
|
|
|
- arcmsr_start_hbc_bgrb(acb);
|
|
|
+ arcmsr_hbaC_start_bgrb(acb);
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D:
|
|
|
+ arcmsr_hbaD_start_bgrb(acb);
|
|
|
+ break;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
@@ -2783,13 +3586,48 @@ static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
|
|
|
}
|
|
|
break;
|
|
|
case ACB_ADAPTER_TYPE_C: {
|
|
|
- struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
|
|
|
- uint32_t outbound_doorbell;
|
|
|
+ struct MessageUnit_C __iomem *reg = acb->pmuC;
|
|
|
+ uint32_t outbound_doorbell, i;
|
|
|
/* empty doorbell Qbuffer if door bell ringed */
|
|
|
outbound_doorbell = readl(®->outbound_doorbell);
|
|
|
writel(outbound_doorbell, ®->outbound_doorbell_clear);
|
|
|
writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell);
|
|
|
+ for (i = 0; i < 200; i++) {
|
|
|
+ msleep(20);
|
|
|
+ outbound_doorbell = readl(®->outbound_doorbell);
|
|
|
+ if (outbound_doorbell &
|
|
|
+ ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
|
|
|
+ writel(outbound_doorbell,
|
|
|
+ ®->outbound_doorbell_clear);
|
|
|
+ writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
|
|
|
+ ®->inbound_doorbell);
|
|
|
+ } else
|
|
|
+ break;
|
|
|
}
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ struct MessageUnit_D *reg = acb->pmuD;
|
|
|
+ uint32_t outbound_doorbell, i;
|
|
|
+ /* empty doorbell Qbuffer if door bell ringed */
|
|
|
+ outbound_doorbell = readl(reg->outbound_doorbell);
|
|
|
+ writel(outbound_doorbell, reg->outbound_doorbell);
|
|
|
+ writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
|
|
|
+ reg->inbound_doorbell);
|
|
|
+ for (i = 0; i < 200; i++) {
|
|
|
+ msleep(20);
|
|
|
+ outbound_doorbell = readl(reg->outbound_doorbell);
|
|
|
+ if (outbound_doorbell &
|
|
|
+ ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
|
|
|
+ writel(outbound_doorbell,
|
|
|
+ reg->outbound_doorbell);
|
|
|
+ writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
|
|
|
+ reg->inbound_doorbell);
|
|
|
+ } else
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ break;
|
|
|
}
|
|
|
}
|
|
|
|
|
|
@@ -2802,7 +3640,7 @@ static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
|
|
|
{
|
|
|
struct MessageUnit_B *reg = acb->pmuB;
|
|
|
writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
|
|
|
- if (!arcmsr_hbb_wait_msgint_ready(acb)) {
|
|
|
+ if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
|
|
|
printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
|
|
|
return;
|
|
|
}
|
|
|
@@ -2820,6 +3658,7 @@ static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
|
|
|
int i, count = 0;
|
|
|
struct MessageUnit_A __iomem *pmuA = acb->pmuA;
|
|
|
struct MessageUnit_C __iomem *pmuC = acb->pmuC;
|
|
|
+ struct MessageUnit_D *pmuD = acb->pmuD;
|
|
|
|
|
|
/* backup pci config data */
|
|
|
printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
|
|
|
@@ -2840,6 +3679,8 @@ static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
|
|
|
writel(0xD, &pmuC->write_sequence);
|
|
|
} while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
|
|
|
writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
|
|
|
+ } else if ((acb->dev_id == 0x1214)) {
|
|
|
+ writel(0x20, pmuD->reset_request);
|
|
|
} else {
|
|
|
pci_write_config_byte(acb->pdev, 0x84, 0x20);
|
|
|
}
|
|
|
@@ -3016,9 +3857,7 @@ sleep:
|
|
|
arcmsr_get_firmware_spec(acb);
|
|
|
arcmsr_start_adapter_bgrb(acb);
|
|
|
/* clear Qbuffer if door bell ringed */
|
|
|
- outbound_doorbell = readl(®->outbound_doorbell);
|
|
|
- writel(outbound_doorbell, ®->outbound_doorbell_clear); /*clear interrupt */
|
|
|
- writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell);
|
|
|
+ arcmsr_clear_doorbell_queue_buffer(acb);
|
|
|
/* enable outbound Post Queue,outbound doorbell Interrupt */
|
|
|
arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
|
atomic_set(&acb->rq_map_token, 16);
|
|
|
@@ -3038,6 +3877,66 @@ sleep:
|
|
|
}
|
|
|
break;
|
|
|
}
|
|
|
+ case ACB_ADAPTER_TYPE_D: {
|
|
|
+ if (acb->acb_flags & ACB_F_BUS_RESET) {
|
|
|
+ long timeout;
|
|
|
+ pr_notice("arcmsr: there is an bus reset"
|
|
|
+ " eh proceeding.......\n");
|
|
|
+ timeout = wait_event_timeout(wait_q, (acb->acb_flags
|
|
|
+ & ACB_F_BUS_RESET) == 0, 220 * HZ);
|
|
|
+ if (timeout)
|
|
|
+ return SUCCESS;
|
|
|
+ }
|
|
|
+ acb->acb_flags |= ACB_F_BUS_RESET;
|
|
|
+ if (!arcmsr_iop_reset(acb)) {
|
|
|
+ struct MessageUnit_D *reg;
|
|
|
+ reg = acb->pmuD;
|
|
|
+ arcmsr_hardware_reset(acb);
|
|
|
+ acb->acb_flags &= ~ACB_F_IOP_INITED;
|
|
|
+ nap:
|
|
|
+ ssleep(ARCMSR_SLEEPTIME);
|
|
|
+ if ((readl(reg->sample_at_reset) & 0x80) != 0) {
|
|
|
+ pr_err("arcmsr%d: waiting for "
|
|
|
+ "hw bus reset return, retry=%d\n",
|
|
|
+ acb->host->host_no, retry_count);
|
|
|
+ if (retry_count > ARCMSR_RETRYCOUNT) {
|
|
|
+ acb->fw_flag = FW_DEADLOCK;
|
|
|
+ pr_err("arcmsr%d: waiting for hw bus"
|
|
|
+ " reset return, "
|
|
|
+ "RETRY TERMINATED!!\n",
|
|
|
+ acb->host->host_no);
|
|
|
+ return FAILED;
|
|
|
+ }
|
|
|
+ retry_count++;
|
|
|
+ goto nap;
|
|
|
+ }
|
|
|
+ acb->acb_flags |= ACB_F_IOP_INITED;
|
|
|
+ /* disable all outbound interrupt */
|
|
|
+ intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
|
+ arcmsr_get_firmware_spec(acb);
|
|
|
+ arcmsr_start_adapter_bgrb(acb);
|
|
|
+ arcmsr_clear_doorbell_queue_buffer(acb);
|
|
|
+ arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
|
+ atomic_set(&acb->rq_map_token, 16);
|
|
|
+ atomic_set(&acb->ante_token_value, 16);
|
|
|
+ acb->fw_flag = FW_NORMAL;
|
|
|
+ mod_timer(&acb->eternal_timer,
|
|
|
+ jiffies + msecs_to_jiffies(6 * HZ));
|
|
|
+ acb->acb_flags &= ~ACB_F_BUS_RESET;
|
|
|
+ rtn = SUCCESS;
|
|
|
+ pr_err("arcmsr: scsi bus reset "
|
|
|
+ "eh returns with success\n");
|
|
|
+ } else {
|
|
|
+ acb->acb_flags &= ~ACB_F_BUS_RESET;
|
|
|
+ atomic_set(&acb->rq_map_token, 16);
|
|
|
+ atomic_set(&acb->ante_token_value, 16);
|
|
|
+ acb->fw_flag = FW_NORMAL;
|
|
|
+ mod_timer(&acb->eternal_timer,
|
|
|
+ jiffies + msecs_to_jiffies(6 * HZ));
|
|
|
+ rtn = SUCCESS;
|
|
|
+ }
|
|
|
+ break;
|
|
|
+ }
|
|
|
}
|
|
|
return rtn;
|
|
|
}
|
|
|
@@ -3056,8 +3955,10 @@ static int arcmsr_abort(struct scsi_cmnd *cmd)
|
|
|
(struct AdapterControlBlock *)cmd->device->host->hostdata;
|
|
|
int i = 0;
|
|
|
int rtn = FAILED;
|
|
|
+ uint32_t intmask_org;
|
|
|
+
|
|
|
printk(KERN_NOTICE
|
|
|
- "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
|
|
|
+ "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
|
|
|
acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
|
|
|
acb->acb_flags |= ACB_F_ABORT;
|
|
|
acb->num_aborts++;
|
|
|
@@ -3067,9 +3968,12 @@ static int arcmsr_abort(struct scsi_cmnd *cmd)
|
|
|
** we need to handle it as soon as possible and exit
|
|
|
************************************************
|
|
|
*/
|
|
|
- if (!atomic_read(&acb->ccboutstandingcount))
|
|
|
+ if (!atomic_read(&acb->ccboutstandingcount)) {
|
|
|
+ acb->acb_flags &= ~ACB_F_ABORT;
|
|
|
return rtn;
|
|
|
+ }
|
|
|
|
|
|
+ intmask_org = arcmsr_disable_outbound_ints(acb);
|
|
|
for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
|
|
|
struct CommandControlBlock *ccb = acb->pccb_pool[i];
|
|
|
if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
|
|
|
@@ -3079,6 +3983,7 @@ static int arcmsr_abort(struct scsi_cmnd *cmd)
|
|
|
}
|
|
|
}
|
|
|
acb->acb_flags &= ~ACB_F_ABORT;
|
|
|
+ arcmsr_enable_outbound_ints(acb, intmask_org);
|
|
|
return rtn;
|
|
|
}
|
|
|
|
|
|
@@ -3108,19 +4013,20 @@ static const char *arcmsr_info(struct Scsi_Host *host)
|
|
|
case PCI_DEVICE_ID_ARECA_1280:
|
|
|
type = "SATA";
|
|
|
break;
|
|
|
+ case PCI_DEVICE_ID_ARECA_1214:
|
|
|
case PCI_DEVICE_ID_ARECA_1380:
|
|
|
case PCI_DEVICE_ID_ARECA_1381:
|
|
|
case PCI_DEVICE_ID_ARECA_1680:
|
|
|
case PCI_DEVICE_ID_ARECA_1681:
|
|
|
case PCI_DEVICE_ID_ARECA_1880:
|
|
|
- type = "SAS";
|
|
|
+ type = "SAS/SATA";
|
|
|
break;
|
|
|
default:
|
|
|
- type = "X-TYPE";
|
|
|
+ type = "unknown";
|
|
|
+ raid6 = 0;
|
|
|
break;
|
|
|
}
|
|
|
- sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
|
|
|
- type, raid6 ? "( RAID6 capable)" : "",
|
|
|
- ARCMSR_DRIVER_VERSION);
|
|
|
+ sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
|
|
|
+ type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
|
|
|
return buf;
|
|
|
}
|
Linus Torvalds