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@@ -6821,10 +6821,13 @@ Theotherbitsarereservedandshouldbezero*/
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#define MDIO_AN_REG_8481_10GBASE_T_AN_CTRL 0x0020
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#define MDIO_AN_REG_8481_10GBASE_T_AN_CTRL 0x0020
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#define MDIO_AN_REG_8481_LEGACY_MII_CTRL 0xffe0
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#define MDIO_AN_REG_8481_LEGACY_MII_CTRL 0xffe0
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+#define MDIO_AN_REG_8481_MII_CTRL_FORCE_1G 0x40
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#define MDIO_AN_REG_8481_LEGACY_MII_STATUS 0xffe1
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#define MDIO_AN_REG_8481_LEGACY_MII_STATUS 0xffe1
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#define MDIO_AN_REG_8481_LEGACY_AN_ADV 0xffe4
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#define MDIO_AN_REG_8481_LEGACY_AN_ADV 0xffe4
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#define MDIO_AN_REG_8481_LEGACY_AN_EXPANSION 0xffe6
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#define MDIO_AN_REG_8481_LEGACY_AN_EXPANSION 0xffe6
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#define MDIO_AN_REG_8481_1000T_CTRL 0xffe9
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#define MDIO_AN_REG_8481_1000T_CTRL 0xffe9
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+#define MDIO_AN_REG_8481_1G_100T_EXT_CTRL 0xfff0
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+#define MIDO_AN_REG_8481_EXT_CTRL_FORCE_LEDS_OFF 0x0008
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#define MDIO_AN_REG_8481_EXPANSION_REG_RD_RW 0xfff5
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#define MDIO_AN_REG_8481_EXPANSION_REG_RD_RW 0xfff5
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#define MDIO_AN_REG_8481_EXPANSION_REG_ACCESS 0xfff7
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#define MDIO_AN_REG_8481_EXPANSION_REG_ACCESS 0xfff7
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#define MDIO_AN_REG_8481_AUX_CTRL 0xfff8
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#define MDIO_AN_REG_8481_AUX_CTRL 0xfff8
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