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drm/amdgpu: add new DF 1.7 register defs

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher 7 年之前
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9963104586

+ 4 - 0
drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_offset.h

@@ -30,4 +30,8 @@
 #define mmDF_CS_AON0_DramBaseAddress0									0x0044
 #define mmDF_CS_AON0_DramBaseAddress0									0x0044
 #define mmDF_CS_AON0_DramBaseAddress0_BASE_IDX								0
 #define mmDF_CS_AON0_DramBaseAddress0_BASE_IDX								0
 
 
+#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0								0x0214
+#define mmDF_CS_AON0_CoherentSlaveModeCtrlA0_BASE_IDX							0
+
+
 #endif
 #endif

+ 4 - 0
drivers/gpu/drm/amd/include/asic_reg/df/df_1_7_sh_mask.h

@@ -45,4 +45,8 @@
 #define DF_CS_AON0_DramBaseAddress0__IntLvAddrSel_MASK							0x00000700L
 #define DF_CS_AON0_DramBaseAddress0__IntLvAddrSel_MASK							0x00000700L
 #define DF_CS_AON0_DramBaseAddress0__DramBaseAddr_MASK							0xFFFFF000L
 #define DF_CS_AON0_DramBaseAddress0__DramBaseAddr_MASK							0xFFFFF000L
 
 
+//DF_CS_AON0_CoherentSlaveModeCtrlA0
+#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW__SHIFT					0x3
+#define DF_CS_AON0_CoherentSlaveModeCtrlA0__ForceParWrRMW_MASK						0x00000008L
+
 #endif
 #endif