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@@ -55,6 +55,7 @@ struct mlx5e_cq_param {
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u32 cqc[MLX5_ST_SZ_DW(cqc)];
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struct mlx5_wq_param wq;
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u16 eq_ix;
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+ u8 cq_period_mode;
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};
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struct mlx5e_channel_param {
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@@ -896,6 +897,7 @@ static int mlx5e_enable_cq(struct mlx5e_cq *cq, struct mlx5e_cq_param *param)
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mlx5_vector2eqn(mdev, param->eq_ix, &eqn, &irqn_not_used);
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+ MLX5_SET(cqc, cqc, cq_period_mode, param->cq_period_mode);
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MLX5_SET(cqc, cqc, c_eqn, eqn);
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MLX5_SET(cqc, cqc, uar_page, mcq->uar->index);
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MLX5_SET(cqc, cqc, log_page_size, cq->wq_ctrl.buf.page_shift -
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@@ -925,8 +927,7 @@ static void mlx5e_disable_cq(struct mlx5e_cq *cq)
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static int mlx5e_open_cq(struct mlx5e_channel *c,
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struct mlx5e_cq_param *param,
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struct mlx5e_cq *cq,
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- u16 moderation_usecs,
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- u16 moderation_frames)
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+ struct mlx5e_cq_moder moderation)
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{
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int err;
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struct mlx5e_priv *priv = c->priv;
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@@ -942,8 +943,8 @@ static int mlx5e_open_cq(struct mlx5e_channel *c,
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if (MLX5_CAP_GEN(mdev, cq_moderation))
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mlx5_core_modify_cq_moderation(mdev, &cq->mcq,
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- moderation_usecs,
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- moderation_frames);
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+ moderation.usec,
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+ moderation.pkts);
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return 0;
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err_destroy_cq:
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@@ -972,8 +973,7 @@ static int mlx5e_open_tx_cqs(struct mlx5e_channel *c,
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for (tc = 0; tc < c->num_tc; tc++) {
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err = mlx5e_open_cq(c, &cparam->tx_cq, &c->sq[tc].cq,
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- priv->params.tx_cq_moderation_usec,
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- priv->params.tx_cq_moderation_pkts);
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+ priv->params.tx_cq_moderation);
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if (err)
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goto err_close_tx_cqs;
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}
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@@ -1110,6 +1110,7 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,
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struct mlx5e_channel_param *cparam,
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struct mlx5e_channel **cp)
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{
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+ struct mlx5e_cq_moder icosq_cq_moder = {0, 0};
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struct net_device *netdev = priv->netdev;
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int cpu = mlx5e_get_cpu(priv, ix);
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struct mlx5e_channel *c;
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@@ -1133,7 +1134,7 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,
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netif_napi_add(netdev, &c->napi, mlx5e_napi_poll, 64);
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- err = mlx5e_open_cq(c, &cparam->icosq_cq, &c->icosq.cq, 0, 0);
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+ err = mlx5e_open_cq(c, &cparam->icosq_cq, &c->icosq.cq, icosq_cq_moder);
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if (err)
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goto err_napi_del;
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@@ -1142,8 +1143,7 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,
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goto err_close_icosq_cq;
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err = mlx5e_open_cq(c, &cparam->rx_cq, &c->rq.cq,
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- priv->params.rx_cq_moderation_usec,
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- priv->params.rx_cq_moderation_pkts);
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+ priv->params.rx_cq_moderation);
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if (err)
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goto err_close_tx_cqs;
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@@ -1308,6 +1308,8 @@ static void mlx5e_build_rx_cq_param(struct mlx5e_priv *priv,
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}
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mlx5e_build_common_cq_param(priv, param);
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+
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+ param->cq_period_mode = priv->params.rx_cq_period_mode;
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}
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static void mlx5e_build_tx_cq_param(struct mlx5e_priv *priv,
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@@ -1318,6 +1320,8 @@ static void mlx5e_build_tx_cq_param(struct mlx5e_priv *priv,
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MLX5_SET(cqc, cqc, log_cq_size, priv->params.log_sq_size);
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mlx5e_build_common_cq_param(priv, param);
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+
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+ param->cq_period_mode = MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
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}
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static void mlx5e_build_ico_cq_param(struct mlx5e_priv *priv,
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@@ -1329,6 +1333,8 @@ static void mlx5e_build_ico_cq_param(struct mlx5e_priv *priv,
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MLX5_SET(cqc, cqc, log_cq_size, log_wq_size);
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mlx5e_build_common_cq_param(priv, param);
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+
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+ param->cq_period_mode = MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
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}
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static void mlx5e_build_icosq_param(struct mlx5e_priv *priv,
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@@ -2856,6 +2862,20 @@ static bool cqe_compress_heuristic(u32 link_speed, u32 pci_bw)
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(pci_bw < 40000) && (pci_bw < link_speed));
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}
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+void mlx5e_set_rx_cq_mode_params(struct mlx5e_params *params, u8 cq_period_mode)
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+{
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+ params->rx_cq_period_mode = cq_period_mode;
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+
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+ params->rx_cq_moderation.pkts =
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+ MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_PKTS;
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+ params->rx_cq_moderation.usec =
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+ MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC;
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+
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+ if (cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE)
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+ params->rx_cq_moderation.usec =
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+ MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC_FROM_CQE;
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+}
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+
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static void mlx5e_build_netdev_priv(struct mlx5_core_dev *mdev,
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struct net_device *netdev,
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int num_channels)
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@@ -2908,13 +2928,13 @@ static void mlx5e_build_netdev_priv(struct mlx5_core_dev *mdev,
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priv->params.min_rx_wqes = mlx5_min_rx_wqes(priv->params.rq_wq_type,
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BIT(priv->params.log_rq_size));
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- priv->params.rx_cq_moderation_usec =
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- MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_USEC;
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- priv->params.rx_cq_moderation_pkts =
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- MLX5E_PARAMS_DEFAULT_RX_CQ_MODERATION_PKTS;
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- priv->params.tx_cq_moderation_usec =
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+
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+ mlx5e_set_rx_cq_mode_params(&priv->params,
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+ MLX5_CQ_PERIOD_MODE_START_FROM_EQE);
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+
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+ priv->params.tx_cq_moderation.usec =
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MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_USEC;
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- priv->params.tx_cq_moderation_pkts =
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+ priv->params.tx_cq_moderation.pkts =
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MLX5E_PARAMS_DEFAULT_TX_CQ_MODERATION_PKTS;
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priv->params.tx_max_inline = mlx5e_get_max_inline_cap(mdev);
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priv->params.num_tc = 1;
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@@ -2929,6 +2949,10 @@ static void mlx5e_build_netdev_priv(struct mlx5_core_dev *mdev,
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priv->params.lro_wqe_sz =
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MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ;
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+ /* Initialize pflags */
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+ MLX5E_SET_PRIV_FLAG(priv, MLX5E_PFLAG_RX_CQE_BASED_MODER,
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+ priv->params.rx_cq_period_mode == MLX5_CQ_PERIOD_MODE_START_FROM_CQE);
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+
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priv->mdev = mdev;
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priv->netdev = netdev;
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priv->params.num_channels = num_channels;
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