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@@ -75,48 +75,48 @@
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#include "otg.h"
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/* Controller register map */
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-static uintptr_t ci_regs_nolpm[] = {
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- [CAP_CAPLENGTH] = 0x000UL,
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- [CAP_HCCPARAMS] = 0x008UL,
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- [CAP_DCCPARAMS] = 0x024UL,
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- [CAP_TESTMODE] = 0x038UL,
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- [OP_USBCMD] = 0x000UL,
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- [OP_USBSTS] = 0x004UL,
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- [OP_USBINTR] = 0x008UL,
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- [OP_DEVICEADDR] = 0x014UL,
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- [OP_ENDPTLISTADDR] = 0x018UL,
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- [OP_PORTSC] = 0x044UL,
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- [OP_DEVLC] = 0x084UL,
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- [OP_OTGSC] = 0x064UL,
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- [OP_USBMODE] = 0x068UL,
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- [OP_ENDPTSETUPSTAT] = 0x06CUL,
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- [OP_ENDPTPRIME] = 0x070UL,
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- [OP_ENDPTFLUSH] = 0x074UL,
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- [OP_ENDPTSTAT] = 0x078UL,
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- [OP_ENDPTCOMPLETE] = 0x07CUL,
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- [OP_ENDPTCTRL] = 0x080UL,
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+static const u8 ci_regs_nolpm[] = {
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+ [CAP_CAPLENGTH] = 0x00U,
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+ [CAP_HCCPARAMS] = 0x08U,
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+ [CAP_DCCPARAMS] = 0x24U,
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+ [CAP_TESTMODE] = 0x38U,
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+ [OP_USBCMD] = 0x00U,
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+ [OP_USBSTS] = 0x04U,
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+ [OP_USBINTR] = 0x08U,
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+ [OP_DEVICEADDR] = 0x14U,
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+ [OP_ENDPTLISTADDR] = 0x18U,
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+ [OP_PORTSC] = 0x44U,
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+ [OP_DEVLC] = 0x84U,
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+ [OP_OTGSC] = 0x64U,
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+ [OP_USBMODE] = 0x68U,
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+ [OP_ENDPTSETUPSTAT] = 0x6CU,
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+ [OP_ENDPTPRIME] = 0x70U,
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+ [OP_ENDPTFLUSH] = 0x74U,
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+ [OP_ENDPTSTAT] = 0x78U,
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+ [OP_ENDPTCOMPLETE] = 0x7CU,
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+ [OP_ENDPTCTRL] = 0x80U,
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};
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-static uintptr_t ci_regs_lpm[] = {
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- [CAP_CAPLENGTH] = 0x000UL,
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- [CAP_HCCPARAMS] = 0x008UL,
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- [CAP_DCCPARAMS] = 0x024UL,
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- [CAP_TESTMODE] = 0x0FCUL,
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- [OP_USBCMD] = 0x000UL,
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- [OP_USBSTS] = 0x004UL,
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- [OP_USBINTR] = 0x008UL,
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- [OP_DEVICEADDR] = 0x014UL,
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- [OP_ENDPTLISTADDR] = 0x018UL,
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- [OP_PORTSC] = 0x044UL,
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- [OP_DEVLC] = 0x084UL,
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- [OP_OTGSC] = 0x0C4UL,
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- [OP_USBMODE] = 0x0C8UL,
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- [OP_ENDPTSETUPSTAT] = 0x0D8UL,
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- [OP_ENDPTPRIME] = 0x0DCUL,
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- [OP_ENDPTFLUSH] = 0x0E0UL,
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- [OP_ENDPTSTAT] = 0x0E4UL,
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- [OP_ENDPTCOMPLETE] = 0x0E8UL,
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- [OP_ENDPTCTRL] = 0x0ECUL,
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+static const u8 ci_regs_lpm[] = {
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+ [CAP_CAPLENGTH] = 0x00U,
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+ [CAP_HCCPARAMS] = 0x08U,
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+ [CAP_DCCPARAMS] = 0x24U,
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+ [CAP_TESTMODE] = 0xFCU,
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+ [OP_USBCMD] = 0x00U,
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+ [OP_USBSTS] = 0x04U,
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+ [OP_USBINTR] = 0x08U,
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+ [OP_DEVICEADDR] = 0x14U,
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+ [OP_ENDPTLISTADDR] = 0x18U,
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+ [OP_PORTSC] = 0x44U,
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+ [OP_DEVLC] = 0x84U,
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+ [OP_OTGSC] = 0xC4U,
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+ [OP_USBMODE] = 0xC8U,
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+ [OP_ENDPTSETUPSTAT] = 0xD8U,
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+ [OP_ENDPTPRIME] = 0xDCU,
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+ [OP_ENDPTFLUSH] = 0xE0U,
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+ [OP_ENDPTSTAT] = 0xE4U,
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+ [OP_ENDPTCOMPLETE] = 0xE8U,
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+ [OP_ENDPTCTRL] = 0xECU,
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};
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static int hw_alloc_regmap(struct ci_hdrc *ci, bool is_lpm)
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