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@@ -24,19 +24,52 @@
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#include "drm_fb_cma_helper.h"
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#include "drm_plane_helper.h"
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+enum vc4_scaling_mode {
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+ VC4_SCALING_NONE,
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+ VC4_SCALING_TPZ,
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+ VC4_SCALING_PPF,
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+};
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+
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struct vc4_plane_state {
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struct drm_plane_state base;
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+ /* System memory copy of the display list for this element, computed
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+ * at atomic_check time.
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+ */
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u32 *dlist;
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- u32 dlist_size; /* Number of dwords in allocated for the display list */
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+ u32 dlist_size; /* Number of dwords allocated for the display list */
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u32 dlist_count; /* Number of used dwords in the display list. */
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- /* Offset in the dlist to pointer word 0. */
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- u32 pw0_offset;
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+ /* Offset in the dlist to various words, for pageflip or
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+ * cursor updates.
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+ */
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+ u32 pos0_offset;
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+ u32 pos2_offset;
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+ u32 ptr0_offset;
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/* Offset where the plane's dlist was last stored in the
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- hardware at vc4_crtc_atomic_flush() time.
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- */
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- u32 *hw_dlist;
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+ * hardware at vc4_crtc_atomic_flush() time.
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+ */
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+ u32 __iomem *hw_dlist;
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+
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+ /* Clipped coordinates of the plane on the display. */
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+ int crtc_x, crtc_y, crtc_w, crtc_h;
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+ /* Clipped area being scanned from in the FB. */
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+ u32 src_x, src_y;
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+
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+ u32 src_w[2], src_h[2];
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+
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+ /* Scaling selection for the RGB/Y plane and the Cb/Cr planes. */
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+ enum vc4_scaling_mode x_scaling[2], y_scaling[2];
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+ bool is_unity;
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+ bool is_yuv;
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+
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+ /* Offset to start scanning out from the start of the plane's
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+ * BO.
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+ */
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+ u32 offsets[3];
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+
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+ /* Our allocation in LBM for temporary storage during scaling. */
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+ struct drm_mm_node lbm;
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};
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static inline struct vc4_plane_state *
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@@ -50,6 +83,7 @@ static const struct hvs_format {
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u32 hvs; /* HVS_FORMAT_* */
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u32 pixel_order;
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bool has_alpha;
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+ bool flip_cbcr;
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} hvs_formats[] = {
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{
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.drm = DRM_FORMAT_XRGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
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@@ -59,6 +93,48 @@ static const struct hvs_format {
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.drm = DRM_FORMAT_ARGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
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.pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = true,
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},
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+ {
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+ .drm = DRM_FORMAT_RGB565, .hvs = HVS_PIXEL_FORMAT_RGB565,
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+ .pixel_order = HVS_PIXEL_ORDER_XRGB, .has_alpha = false,
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+ },
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+ {
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+ .drm = DRM_FORMAT_BGR565, .hvs = HVS_PIXEL_FORMAT_RGB565,
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+ .pixel_order = HVS_PIXEL_ORDER_XBGR, .has_alpha = false,
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+ },
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+ {
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+ .drm = DRM_FORMAT_ARGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551,
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+ .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = true,
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+ },
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+ {
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+ .drm = DRM_FORMAT_XRGB1555, .hvs = HVS_PIXEL_FORMAT_RGBA5551,
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+ .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = false,
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+ },
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+ {
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+ .drm = DRM_FORMAT_YUV422,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
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+ },
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+ {
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+ .drm = DRM_FORMAT_YVU422,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_3PLANE,
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+ .flip_cbcr = true,
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+ },
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+ {
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+ .drm = DRM_FORMAT_YUV420,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
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+ },
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+ {
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+ .drm = DRM_FORMAT_YVU420,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE,
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+ .flip_cbcr = true,
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+ },
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+ {
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+ .drm = DRM_FORMAT_NV12,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV420_2PLANE,
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+ },
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+ {
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+ .drm = DRM_FORMAT_NV16,
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+ .hvs = HVS_PIXEL_FORMAT_YCBCR_YUV422_2PLANE,
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+ },
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};
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static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
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@@ -73,6 +149,16 @@ static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
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return NULL;
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}
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+static enum vc4_scaling_mode vc4_get_scaling_mode(u32 src, u32 dst)
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+{
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+ if (dst > src)
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+ return VC4_SCALING_PPF;
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+ else if (dst < src)
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+ return VC4_SCALING_TPZ;
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+ else
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+ return VC4_SCALING_NONE;
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+}
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+
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static bool plane_enabled(struct drm_plane_state *state)
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{
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return state->fb && state->crtc;
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@@ -89,6 +175,8 @@ static struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane
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if (!vc4_state)
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return NULL;
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+ memset(&vc4_state->lbm, 0, sizeof(vc4_state->lbm));
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+
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__drm_atomic_helper_plane_duplicate_state(plane, &vc4_state->base);
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if (vc4_state->dlist) {
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@@ -108,8 +196,17 @@ static struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane
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static void vc4_plane_destroy_state(struct drm_plane *plane,
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struct drm_plane_state *state)
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{
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+ struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
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struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
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+ if (vc4_state->lbm.allocated) {
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+ unsigned long irqflags;
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+
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+ spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
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+ drm_mm_remove_node(&vc4_state->lbm);
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+ spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
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+ }
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+
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kfree(vc4_state->dlist);
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__drm_atomic_helper_plane_destroy_state(plane, &vc4_state->base);
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kfree(state);
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@@ -148,84 +245,400 @@ static void vc4_dlist_write(struct vc4_plane_state *vc4_state, u32 val)
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vc4_state->dlist[vc4_state->dlist_count++] = val;
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}
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+/* Returns the scl0/scl1 field based on whether the dimensions need to
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+ * be up/down/non-scaled.
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+ *
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+ * This is a replication of a table from the spec.
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+ */
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+static u32 vc4_get_scl_field(struct drm_plane_state *state, int plane)
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+{
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+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
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+
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+ switch (vc4_state->x_scaling[plane] << 2 | vc4_state->y_scaling[plane]) {
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+ case VC4_SCALING_PPF << 2 | VC4_SCALING_PPF:
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+ return SCALER_CTL0_SCL_H_PPF_V_PPF;
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+ case VC4_SCALING_TPZ << 2 | VC4_SCALING_PPF:
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+ return SCALER_CTL0_SCL_H_TPZ_V_PPF;
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+ case VC4_SCALING_PPF << 2 | VC4_SCALING_TPZ:
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+ return SCALER_CTL0_SCL_H_PPF_V_TPZ;
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+ case VC4_SCALING_TPZ << 2 | VC4_SCALING_TPZ:
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+ return SCALER_CTL0_SCL_H_TPZ_V_TPZ;
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+ case VC4_SCALING_PPF << 2 | VC4_SCALING_NONE:
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+ return SCALER_CTL0_SCL_H_PPF_V_NONE;
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+ case VC4_SCALING_NONE << 2 | VC4_SCALING_PPF:
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+ return SCALER_CTL0_SCL_H_NONE_V_PPF;
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+ case VC4_SCALING_NONE << 2 | VC4_SCALING_TPZ:
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+ return SCALER_CTL0_SCL_H_NONE_V_TPZ;
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+ case VC4_SCALING_TPZ << 2 | VC4_SCALING_NONE:
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+ return SCALER_CTL0_SCL_H_TPZ_V_NONE;
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+ default:
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+ case VC4_SCALING_NONE << 2 | VC4_SCALING_NONE:
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+ /* The unity case is independently handled by
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+ * SCALER_CTL0_UNITY.
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+ */
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+ return 0;
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+ }
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+}
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+
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+static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
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+{
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+ struct drm_plane *plane = state->plane;
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+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
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+ struct drm_framebuffer *fb = state->fb;
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+ struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
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+ u32 subpixel_src_mask = (1 << 16) - 1;
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+ u32 format = fb->pixel_format;
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+ int num_planes = drm_format_num_planes(format);
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+ u32 h_subsample = 1;
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+ u32 v_subsample = 1;
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+ int i;
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+
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+ for (i = 0; i < num_planes; i++)
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+ vc4_state->offsets[i] = bo->paddr + fb->offsets[i];
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+
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+ /* We don't support subpixel source positioning for scaling. */
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+ if ((state->src_x & subpixel_src_mask) ||
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+ (state->src_y & subpixel_src_mask) ||
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+ (state->src_w & subpixel_src_mask) ||
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+ (state->src_h & subpixel_src_mask)) {
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+ return -EINVAL;
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+ }
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+
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+ vc4_state->src_x = state->src_x >> 16;
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+ vc4_state->src_y = state->src_y >> 16;
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+ vc4_state->src_w[0] = state->src_w >> 16;
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+ vc4_state->src_h[0] = state->src_h >> 16;
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+
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+ vc4_state->crtc_x = state->crtc_x;
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+ vc4_state->crtc_y = state->crtc_y;
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+ vc4_state->crtc_w = state->crtc_w;
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+ vc4_state->crtc_h = state->crtc_h;
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+
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+ vc4_state->x_scaling[0] = vc4_get_scaling_mode(vc4_state->src_w[0],
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+ vc4_state->crtc_w);
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+ vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0],
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+ vc4_state->crtc_h);
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+
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+ if (num_planes > 1) {
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+ vc4_state->is_yuv = true;
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+
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+ h_subsample = drm_format_horz_chroma_subsampling(format);
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+ v_subsample = drm_format_vert_chroma_subsampling(format);
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+ vc4_state->src_w[1] = vc4_state->src_w[0] / h_subsample;
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+ vc4_state->src_h[1] = vc4_state->src_h[0] / v_subsample;
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+
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+ vc4_state->x_scaling[1] =
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+ vc4_get_scaling_mode(vc4_state->src_w[1],
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+ vc4_state->crtc_w);
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+ vc4_state->y_scaling[1] =
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+ vc4_get_scaling_mode(vc4_state->src_h[1],
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+ vc4_state->crtc_h);
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+
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+ /* YUV conversion requires that scaling be enabled,
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+ * even on a plane that's otherwise 1:1. Choose TPZ
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+ * for simplicity.
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+ */
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+ if (vc4_state->x_scaling[0] == VC4_SCALING_NONE)
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+ vc4_state->x_scaling[0] = VC4_SCALING_TPZ;
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+ if (vc4_state->y_scaling[0] == VC4_SCALING_NONE)
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+ vc4_state->y_scaling[0] = VC4_SCALING_TPZ;
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+ }
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+
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+ vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE &&
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+ vc4_state->y_scaling[0] == VC4_SCALING_NONE &&
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+ vc4_state->x_scaling[1] == VC4_SCALING_NONE &&
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+ vc4_state->y_scaling[1] == VC4_SCALING_NONE);
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+
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+ /* No configuring scaling on the cursor plane, since it gets
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+ non-vblank-synced updates, and scaling requires requires
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+ LBM changes which have to be vblank-synced.
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+ */
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+ if (plane->type == DRM_PLANE_TYPE_CURSOR && !vc4_state->is_unity)
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+ return -EINVAL;
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+
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+ /* Clamp the on-screen start x/y to 0. The hardware doesn't
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+ * support negative y, and negative x wastes bandwidth.
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+ */
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+ if (vc4_state->crtc_x < 0) {
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+ for (i = 0; i < num_planes; i++) {
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+ u32 cpp = drm_format_plane_cpp(fb->pixel_format, i);
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+ u32 subs = ((i == 0) ? 1 : h_subsample);
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+
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+ vc4_state->offsets[i] += (cpp *
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+ (-vc4_state->crtc_x) / subs);
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+ }
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+ vc4_state->src_w[0] += vc4_state->crtc_x;
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+ vc4_state->src_w[1] += vc4_state->crtc_x / h_subsample;
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+ vc4_state->crtc_x = 0;
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+ }
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+
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+ if (vc4_state->crtc_y < 0) {
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+ for (i = 0; i < num_planes; i++) {
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+ u32 subs = ((i == 0) ? 1 : v_subsample);
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+
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+ vc4_state->offsets[i] += (fb->pitches[i] *
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+ (-vc4_state->crtc_y) / subs);
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+ }
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+ vc4_state->src_h[0] += vc4_state->crtc_y;
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+ vc4_state->src_h[1] += vc4_state->crtc_y / v_subsample;
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+ vc4_state->crtc_y = 0;
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+ }
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+
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+ return 0;
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+}
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+
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+static void vc4_write_tpz(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
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+{
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+ u32 scale, recip;
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+
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+ scale = (1 << 16) * src / dst;
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+
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+ /* The specs note that while the reciprocal would be defined
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+ * as (1<<32)/scale, ~0 is close enough.
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+ */
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+ recip = ~0 / scale;
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+
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+ vc4_dlist_write(vc4_state,
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+ VC4_SET_FIELD(scale, SCALER_TPZ0_SCALE) |
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+ VC4_SET_FIELD(0, SCALER_TPZ0_IPHASE));
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+ vc4_dlist_write(vc4_state,
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+ VC4_SET_FIELD(recip, SCALER_TPZ1_RECIP));
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+}
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+
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+static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst)
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+{
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+ u32 scale = (1 << 16) * src / dst;
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+
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+ vc4_dlist_write(vc4_state,
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+ SCALER_PPF_AGC |
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+ VC4_SET_FIELD(scale, SCALER_PPF_SCALE) |
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+ VC4_SET_FIELD(0, SCALER_PPF_IPHASE));
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+}
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+
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+static u32 vc4_lbm_size(struct drm_plane_state *state)
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+{
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+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
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+ /* This is the worst case number. One of the two sizes will
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+ * be used depending on the scaling configuration.
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+ */
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+ u32 pix_per_line = max(vc4_state->src_w[0], (u32)vc4_state->crtc_w);
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+ u32 lbm;
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+
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+ if (!vc4_state->is_yuv) {
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+ if (vc4_state->is_unity)
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+ return 0;
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+ else if (vc4_state->y_scaling[0] == VC4_SCALING_TPZ)
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+ lbm = pix_per_line * 8;
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+ else {
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+ /* In special cases, this multiplier might be 12. */
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+ lbm = pix_per_line * 16;
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+ }
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+ } else {
|
|
|
+ /* There are cases for this going down to a multiplier
|
|
|
+ * of 2, but according to the firmware source, the
|
|
|
+ * table in the docs is somewhat wrong.
|
|
|
+ */
|
|
|
+ lbm = pix_per_line * 16;
|
|
|
+ }
|
|
|
+
|
|
|
+ lbm = roundup(lbm, 32);
|
|
|
+
|
|
|
+ return lbm;
|
|
|
+}
|
|
|
+
|
|
|
+static void vc4_write_scaling_parameters(struct drm_plane_state *state,
|
|
|
+ int channel)
|
|
|
+{
|
|
|
+ struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
|
|
|
+
|
|
|
+ /* Ch0 H-PPF Word 0: Scaling Parameters */
|
|
|
+ if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) {
|
|
|
+ vc4_write_ppf(vc4_state,
|
|
|
+ vc4_state->src_w[channel], vc4_state->crtc_w);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
|
|
|
+ if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) {
|
|
|
+ vc4_write_ppf(vc4_state,
|
|
|
+ vc4_state->src_h[channel], vc4_state->crtc_h);
|
|
|
+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Ch0 H-TPZ Words 0-1: Scaling Parameters, Recip */
|
|
|
+ if (vc4_state->x_scaling[channel] == VC4_SCALING_TPZ) {
|
|
|
+ vc4_write_tpz(vc4_state,
|
|
|
+ vc4_state->src_w[channel], vc4_state->crtc_w);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Ch0 V-TPZ Words 0-2: Scaling Parameters, Recip, Context */
|
|
|
+ if (vc4_state->y_scaling[channel] == VC4_SCALING_TPZ) {
|
|
|
+ vc4_write_tpz(vc4_state,
|
|
|
+ vc4_state->src_h[channel], vc4_state->crtc_h);
|
|
|
+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
/* Writes out a full display list for an active plane to the plane's
|
|
|
* private dlist state.
|
|
|
*/
|
|
|
static int vc4_plane_mode_set(struct drm_plane *plane,
|
|
|
struct drm_plane_state *state)
|
|
|
{
|
|
|
+ struct vc4_dev *vc4 = to_vc4_dev(plane->dev);
|
|
|
struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
|
|
|
struct drm_framebuffer *fb = state->fb;
|
|
|
- struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
|
|
|
u32 ctl0_offset = vc4_state->dlist_count;
|
|
|
const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
|
|
|
- uint32_t offset = fb->offsets[0];
|
|
|
- int crtc_x = state->crtc_x;
|
|
|
- int crtc_y = state->crtc_y;
|
|
|
- int crtc_w = state->crtc_w;
|
|
|
- int crtc_h = state->crtc_h;
|
|
|
-
|
|
|
- if (state->crtc_w << 16 != state->src_w ||
|
|
|
- state->crtc_h << 16 != state->src_h) {
|
|
|
- /* We don't support scaling yet, which involves
|
|
|
- * allocating the LBM memory for scaling temporary
|
|
|
- * storage, and putting filter kernels in the HVS
|
|
|
- * context.
|
|
|
- */
|
|
|
- return -EINVAL;
|
|
|
+ int num_planes = drm_format_num_planes(format->drm);
|
|
|
+ u32 scl0, scl1;
|
|
|
+ u32 lbm_size;
|
|
|
+ unsigned long irqflags;
|
|
|
+ int ret, i;
|
|
|
+
|
|
|
+ ret = vc4_plane_setup_clipping_and_scaling(state);
|
|
|
+ if (ret)
|
|
|
+ return ret;
|
|
|
+
|
|
|
+ /* Allocate the LBM memory that the HVS will use for temporary
|
|
|
+ * storage due to our scaling/format conversion.
|
|
|
+ */
|
|
|
+ lbm_size = vc4_lbm_size(state);
|
|
|
+ if (lbm_size) {
|
|
|
+ if (!vc4_state->lbm.allocated) {
|
|
|
+ spin_lock_irqsave(&vc4->hvs->mm_lock, irqflags);
|
|
|
+ ret = drm_mm_insert_node(&vc4->hvs->lbm_mm,
|
|
|
+ &vc4_state->lbm,
|
|
|
+ lbm_size, 32, 0);
|
|
|
+ spin_unlock_irqrestore(&vc4->hvs->mm_lock, irqflags);
|
|
|
+ } else {
|
|
|
+ WARN_ON_ONCE(lbm_size != vc4_state->lbm.size);
|
|
|
+ }
|
|
|
}
|
|
|
|
|
|
- if (crtc_x < 0) {
|
|
|
- offset += drm_format_plane_cpp(fb->pixel_format, 0) * -crtc_x;
|
|
|
- crtc_w += crtc_x;
|
|
|
- crtc_x = 0;
|
|
|
- }
|
|
|
+ if (ret)
|
|
|
+ return ret;
|
|
|
|
|
|
- if (crtc_y < 0) {
|
|
|
- offset += fb->pitches[0] * -crtc_y;
|
|
|
- crtc_h += crtc_y;
|
|
|
- crtc_y = 0;
|
|
|
+ /* SCL1 is used for Cb/Cr scaling of planar formats. For RGB
|
|
|
+ * and 4:4:4, scl1 should be set to scl0 so both channels of
|
|
|
+ * the scaler do the same thing. For YUV, the Y plane needs
|
|
|
+ * to be put in channel 1 and Cb/Cr in channel 0, so we swap
|
|
|
+ * the scl fields here.
|
|
|
+ */
|
|
|
+ if (num_planes == 1) {
|
|
|
+ scl0 = vc4_get_scl_field(state, 1);
|
|
|
+ scl1 = scl0;
|
|
|
+ } else {
|
|
|
+ scl0 = vc4_get_scl_field(state, 1);
|
|
|
+ scl1 = vc4_get_scl_field(state, 0);
|
|
|
}
|
|
|
|
|
|
+ /* Control word */
|
|
|
vc4_dlist_write(vc4_state,
|
|
|
SCALER_CTL0_VALID |
|
|
|
(format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
|
|
|
(format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) |
|
|
|
- SCALER_CTL0_UNITY);
|
|
|
+ (vc4_state->is_unity ? SCALER_CTL0_UNITY : 0) |
|
|
|
+ VC4_SET_FIELD(scl0, SCALER_CTL0_SCL0) |
|
|
|
+ VC4_SET_FIELD(scl1, SCALER_CTL0_SCL1));
|
|
|
|
|
|
/* Position Word 0: Image Positions and Alpha Value */
|
|
|
+ vc4_state->pos0_offset = vc4_state->dlist_count;
|
|
|
vc4_dlist_write(vc4_state,
|
|
|
VC4_SET_FIELD(0xff, SCALER_POS0_FIXED_ALPHA) |
|
|
|
- VC4_SET_FIELD(crtc_x, SCALER_POS0_START_X) |
|
|
|
- VC4_SET_FIELD(crtc_y, SCALER_POS0_START_Y));
|
|
|
-
|
|
|
- /* Position Word 1: Scaled Image Dimensions.
|
|
|
- * Skipped due to SCALER_CTL0_UNITY scaling.
|
|
|
- */
|
|
|
+ VC4_SET_FIELD(vc4_state->crtc_x, SCALER_POS0_START_X) |
|
|
|
+ VC4_SET_FIELD(vc4_state->crtc_y, SCALER_POS0_START_Y));
|
|
|
+
|
|
|
+ /* Position Word 1: Scaled Image Dimensions. */
|
|
|
+ if (!vc4_state->is_unity) {
|
|
|
+ vc4_dlist_write(vc4_state,
|
|
|
+ VC4_SET_FIELD(vc4_state->crtc_w,
|
|
|
+ SCALER_POS1_SCL_WIDTH) |
|
|
|
+ VC4_SET_FIELD(vc4_state->crtc_h,
|
|
|
+ SCALER_POS1_SCL_HEIGHT));
|
|
|
+ }
|
|
|
|
|
|
/* Position Word 2: Source Image Size, Alpha Mode */
|
|
|
+ vc4_state->pos2_offset = vc4_state->dlist_count;
|
|
|
vc4_dlist_write(vc4_state,
|
|
|
VC4_SET_FIELD(format->has_alpha ?
|
|
|
SCALER_POS2_ALPHA_MODE_PIPELINE :
|
|
|
SCALER_POS2_ALPHA_MODE_FIXED,
|
|
|
SCALER_POS2_ALPHA_MODE) |
|
|
|
- VC4_SET_FIELD(crtc_w, SCALER_POS2_WIDTH) |
|
|
|
- VC4_SET_FIELD(crtc_h, SCALER_POS2_HEIGHT));
|
|
|
+ VC4_SET_FIELD(vc4_state->src_w[0], SCALER_POS2_WIDTH) |
|
|
|
+ VC4_SET_FIELD(vc4_state->src_h[0], SCALER_POS2_HEIGHT));
|
|
|
|
|
|
/* Position Word 3: Context. Written by the HVS. */
|
|
|
vc4_dlist_write(vc4_state, 0xc0c0c0c0);
|
|
|
|
|
|
- vc4_state->pw0_offset = vc4_state->dlist_count;
|
|
|
|
|
|
- /* Pointer Word 0: RGB / Y Pointer */
|
|
|
- vc4_dlist_write(vc4_state, bo->paddr + offset);
|
|
|
+ /* Pointer Word 0/1/2: RGB / Y / Cb / Cr Pointers
|
|
|
+ *
|
|
|
+ * The pointers may be any byte address.
|
|
|
+ */
|
|
|
+ vc4_state->ptr0_offset = vc4_state->dlist_count;
|
|
|
+ if (!format->flip_cbcr) {
|
|
|
+ for (i = 0; i < num_planes; i++)
|
|
|
+ vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
|
|
|
+ } else {
|
|
|
+ WARN_ON_ONCE(num_planes != 3);
|
|
|
+ vc4_dlist_write(vc4_state, vc4_state->offsets[0]);
|
|
|
+ vc4_dlist_write(vc4_state, vc4_state->offsets[2]);
|
|
|
+ vc4_dlist_write(vc4_state, vc4_state->offsets[1]);
|
|
|
+ }
|
|
|
|
|
|
- /* Pointer Context Word 0: Written by the HVS */
|
|
|
- vc4_dlist_write(vc4_state, 0xc0c0c0c0);
|
|
|
+ /* Pointer Context Word 0/1/2: Written by the HVS */
|
|
|
+ for (i = 0; i < num_planes; i++)
|
|
|
+ vc4_dlist_write(vc4_state, 0xc0c0c0c0);
|
|
|
|
|
|
- /* Pitch word 0: Pointer 0 Pitch */
|
|
|
- vc4_dlist_write(vc4_state,
|
|
|
- VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH));
|
|
|
+ /* Pitch word 0/1/2 */
|
|
|
+ for (i = 0; i < num_planes; i++) {
|
|
|
+ vc4_dlist_write(vc4_state,
|
|
|
+ VC4_SET_FIELD(fb->pitches[i], SCALER_SRC_PITCH));
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Colorspace conversion words */
|
|
|
+ if (vc4_state->is_yuv) {
|
|
|
+ vc4_dlist_write(vc4_state, SCALER_CSC0_ITR_R_601_5);
|
|
|
+ vc4_dlist_write(vc4_state, SCALER_CSC1_ITR_R_601_5);
|
|
|
+ vc4_dlist_write(vc4_state, SCALER_CSC2_ITR_R_601_5);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (!vc4_state->is_unity) {
|
|
|
+ /* LBM Base Address. */
|
|
|
+ if (vc4_state->y_scaling[0] != VC4_SCALING_NONE ||
|
|
|
+ vc4_state->y_scaling[1] != VC4_SCALING_NONE) {
|
|
|
+ vc4_dlist_write(vc4_state, vc4_state->lbm.start);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (num_planes > 1) {
|
|
|
+ /* Emit Cb/Cr as channel 0 and Y as channel
|
|
|
+ * 1. This matches how we set up scl0/scl1
|
|
|
+ * above.
|
|
|
+ */
|
|
|
+ vc4_write_scaling_parameters(state, 1);
|
|
|
+ }
|
|
|
+ vc4_write_scaling_parameters(state, 0);
|
|
|
+
|
|
|
+ /* If any PPF setup was done, then all the kernel
|
|
|
+ * pointers get uploaded.
|
|
|
+ */
|
|
|
+ if (vc4_state->x_scaling[0] == VC4_SCALING_PPF ||
|
|
|
+ vc4_state->y_scaling[0] == VC4_SCALING_PPF ||
|
|
|
+ vc4_state->x_scaling[1] == VC4_SCALING_PPF ||
|
|
|
+ vc4_state->y_scaling[1] == VC4_SCALING_PPF) {
|
|
|
+ u32 kernel = VC4_SET_FIELD(vc4->hvs->mitchell_netravali_filter.start,
|
|
|
+ SCALER_PPF_KERNEL_OFFSET);
|
|
|
+
|
|
|
+ /* HPPF plane 0 */
|
|
|
+ vc4_dlist_write(vc4_state, kernel);
|
|
|
+ /* VPPF plane 0 */
|
|
|
+ vc4_dlist_write(vc4_state, kernel);
|
|
|
+ /* HPPF plane 1 */
|
|
|
+ vc4_dlist_write(vc4_state, kernel);
|
|
|
+ /* VPPF plane 1 */
|
|
|
+ vc4_dlist_write(vc4_state, kernel);
|
|
|
+ }
|
|
|
+ }
|
|
|
|
|
|
vc4_state->dlist[ctl0_offset] |=
|
|
|
VC4_SET_FIELD(vc4_state->dlist_count, SCALER_CTL0_SIZE);
|
|
|
@@ -303,13 +716,13 @@ void vc4_plane_async_set_fb(struct drm_plane *plane, struct drm_framebuffer *fb)
|
|
|
* scanout will start from this address as soon as the FIFO
|
|
|
* needs to refill with pixels.
|
|
|
*/
|
|
|
- writel(addr, &vc4_state->hw_dlist[vc4_state->pw0_offset]);
|
|
|
+ writel(addr, &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
|
|
|
|
|
|
/* Also update the CPU-side dlist copy, so that any later
|
|
|
* atomic updates that don't do a new modeset on our plane
|
|
|
* also use our updated address.
|
|
|
*/
|
|
|
- vc4_state->dlist[vc4_state->pw0_offset] = addr;
|
|
|
+ vc4_state->dlist[vc4_state->ptr0_offset] = addr;
|
|
|
}
|
|
|
|
|
|
static const struct drm_plane_helper_funcs vc4_plane_helper_funcs = {
|
|
|
@@ -325,8 +738,83 @@ static void vc4_plane_destroy(struct drm_plane *plane)
|
|
|
drm_plane_cleanup(plane);
|
|
|
}
|
|
|
|
|
|
+/* Implements immediate (non-vblank-synced) updates of the cursor
|
|
|
+ * position, or falls back to the atomic helper otherwise.
|
|
|
+ */
|
|
|
+static int
|
|
|
+vc4_update_plane(struct drm_plane *plane,
|
|
|
+ struct drm_crtc *crtc,
|
|
|
+ struct drm_framebuffer *fb,
|
|
|
+ int crtc_x, int crtc_y,
|
|
|
+ unsigned int crtc_w, unsigned int crtc_h,
|
|
|
+ uint32_t src_x, uint32_t src_y,
|
|
|
+ uint32_t src_w, uint32_t src_h)
|
|
|
+{
|
|
|
+ struct drm_plane_state *plane_state;
|
|
|
+ struct vc4_plane_state *vc4_state;
|
|
|
+
|
|
|
+ if (plane != crtc->cursor)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ plane_state = plane->state;
|
|
|
+ vc4_state = to_vc4_plane_state(plane_state);
|
|
|
+
|
|
|
+ if (!plane_state)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ /* If we're changing the cursor contents, do that in the
|
|
|
+ * normal vblank-synced atomic path.
|
|
|
+ */
|
|
|
+ if (fb != plane_state->fb)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ /* No configuring new scaling in the fast path. */
|
|
|
+ if (crtc_w != plane_state->crtc_w ||
|
|
|
+ crtc_h != plane_state->crtc_h ||
|
|
|
+ src_w != plane_state->src_w ||
|
|
|
+ src_h != plane_state->src_h) {
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Set the cursor's position on the screen. This is the
|
|
|
+ * expected change from the drm_mode_cursor_universal()
|
|
|
+ * helper.
|
|
|
+ */
|
|
|
+ plane_state->crtc_x = crtc_x;
|
|
|
+ plane_state->crtc_y = crtc_y;
|
|
|
+
|
|
|
+ /* Allow changing the start position within the cursor BO, if
|
|
|
+ * that matters.
|
|
|
+ */
|
|
|
+ plane_state->src_x = src_x;
|
|
|
+ plane_state->src_y = src_y;
|
|
|
+
|
|
|
+ /* Update the display list based on the new crtc_x/y. */
|
|
|
+ vc4_plane_atomic_check(plane, plane_state);
|
|
|
+
|
|
|
+ /* Note that we can't just call vc4_plane_write_dlist()
|
|
|
+ * because that would smash the context data that the HVS is
|
|
|
+ * currently using.
|
|
|
+ */
|
|
|
+ writel(vc4_state->dlist[vc4_state->pos0_offset],
|
|
|
+ &vc4_state->hw_dlist[vc4_state->pos0_offset]);
|
|
|
+ writel(vc4_state->dlist[vc4_state->pos2_offset],
|
|
|
+ &vc4_state->hw_dlist[vc4_state->pos2_offset]);
|
|
|
+ writel(vc4_state->dlist[vc4_state->ptr0_offset],
|
|
|
+ &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
|
|
|
+
|
|
|
+ return 0;
|
|
|
+
|
|
|
+out:
|
|
|
+ return drm_atomic_helper_update_plane(plane, crtc, fb,
|
|
|
+ crtc_x, crtc_y,
|
|
|
+ crtc_w, crtc_h,
|
|
|
+ src_x, src_y,
|
|
|
+ src_w, src_h);
|
|
|
+}
|
|
|
+
|
|
|
static const struct drm_plane_funcs vc4_plane_funcs = {
|
|
|
- .update_plane = drm_atomic_helper_update_plane,
|
|
|
+ .update_plane = vc4_update_plane,
|
|
|
.disable_plane = drm_atomic_helper_disable_plane,
|
|
|
.destroy = vc4_plane_destroy,
|
|
|
.set_property = NULL,
|
|
|
@@ -341,6 +829,7 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
|
|
|
struct drm_plane *plane = NULL;
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|
|
struct vc4_plane *vc4_plane;
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|
|
u32 formats[ARRAY_SIZE(hvs_formats)];
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|
|
+ u32 num_formats = 0;
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|
|
int ret = 0;
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|
|
unsigned i;
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|
|
|
|
|
@@ -351,12 +840,20 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
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|
goto fail;
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|
}
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|
|
|
|
|
- for (i = 0; i < ARRAY_SIZE(hvs_formats); i++)
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|
- formats[i] = hvs_formats[i].drm;
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|
+ for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) {
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+ /* Don't allow YUV in cursor planes, since that means
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|
|
+ * tuning on the scaler, which we don't allow for the
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|
|
+ * cursor.
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|
|
+ */
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|
|
+ if (type != DRM_PLANE_TYPE_CURSOR ||
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|
|
+ hvs_formats[i].hvs < HVS_PIXEL_FORMAT_YCBCR_YUV420_3PLANE) {
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|
|
+ formats[num_formats++] = hvs_formats[i].drm;
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|
|
+ }
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|
|
+ }
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|
|
plane = &vc4_plane->base;
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|
ret = drm_universal_plane_init(dev, plane, 0xff,
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|
|
&vc4_plane_funcs,
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|
|
- formats, ARRAY_SIZE(formats),
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|
|
+ formats, num_formats,
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|
|
type, NULL);
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|
|
|
|
|
drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
|
Dave Airlie