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@@ -11,7 +11,7 @@
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Many PCI bus controllers are able to detect a variety of hardware
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PCI errors on the bus, such as parity errors on the data and address
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-busses, as well as SERR and PERR errors. Some of the more advanced
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+buses, as well as SERR and PERR errors. Some of the more advanced
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chipsets are able to deal with these errors; these include PCI-E chipsets,
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and the PCI-host bridges found on IBM Power4, Power5 and Power6-based
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pSeries boxes. A typical action taken is to disconnect the affected device,
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@@ -173,7 +173,7 @@ is STEP 6 (Permanent Failure).
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>>> a value of 0xff on read, and writes will be dropped. If more than
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>>> EEH_MAX_FAILS I/O's are attempted to a frozen adapter, EEH
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>>> assumes that the device driver has gone into an infinite loop
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->>> and prints an error to syslog. A reboot is then required to
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+>>> and prints an error to syslog. A reboot is then required to
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>>> get the device working again.
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STEP 2: MMIO Enabled
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@@ -231,14 +231,14 @@ proceeds to STEP 4 (Slot Reset)
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STEP 3: Link Reset
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------------------
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The platform resets the link. This is a PCI-Express specific step
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-and is done whenever a non-fatal error has been detected that can be
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+and is done whenever a fatal error has been detected that can be
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"solved" by resetting the link.
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STEP 4: Slot Reset
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------------------
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In response to a return value of PCI_ERS_RESULT_NEED_RESET, the
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-the platform will perform a slot reset on the requesting PCI device(s).
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+the platform will perform a slot reset on the requesting PCI device(s).
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The actual steps taken by a platform to perform a slot reset
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will be platform-dependent. Upon completion of slot reset, the
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platform will call the device slot_reset() callback.
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@@ -258,7 +258,7 @@ configuration registers to initialize to their default conditions.
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For most PCI devices, a soft reset will be sufficient for recovery.
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Optional fundamental reset is provided to support a limited number
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-of PCI Express PCI devices for which a soft reset is not sufficient
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+of PCI Express devices for which a soft reset is not sufficient
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for recovery.
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If the platform supports PCI hotplug, then the reset might be
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@@ -303,7 +303,7 @@ driver performs device init only from PCI function 0:
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Same as above.
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Drivers for PCI Express cards that require a fundamental reset must
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-set the needs_freset bit in the pci_dev structure in their probe function.
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+set the needs_freset bit in the pci_dev structure in their probe function.
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For example, the QLogic qla2xxx driver sets the needs_freset bit for certain
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PCI card types:
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Cao jin