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@@ -906,6 +906,32 @@ static const struct panel_desc chunghwa_claa101wb01 = {
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},
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};
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+static const struct drm_display_mode dataimage_scf0700c48ggu18_mode = {
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+ .clock = 33260,
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+ .hdisplay = 800,
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+ .hsync_start = 800 + 40,
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+ .hsync_end = 800 + 40 + 128,
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+ .htotal = 800 + 40 + 128 + 88,
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+ .vdisplay = 480,
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+ .vsync_start = 480 + 10,
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+ .vsync_end = 480 + 10 + 2,
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+ .vtotal = 480 + 10 + 2 + 33,
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+ .vrefresh = 60,
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+ .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
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+};
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+
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+static const struct panel_desc dataimage_scf0700c48ggu18 = {
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+ .modes = &dataimage_scf0700c48ggu18_mode,
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+ .num_modes = 1,
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+ .bpc = 8,
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+ .size = {
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+ .width = 152,
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+ .height = 91,
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+ },
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+ .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
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+ .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE,
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+};
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+
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static const struct display_timing dlc_dlc0700yzg_1_timing = {
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.pixelclock = { 45000000, 51200000, 57000000 },
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.hactive = { 1024, 1024, 1024 },
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@@ -2331,6 +2357,9 @@ static const struct of_device_id platform_of_match[] = {
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}, {
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.compatible = "chunghwa,claa101wb01",
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.data = &chunghwa_claa101wb01
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+ }, {
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+ .compatible = "dataimage,scf0700c48ggu18",
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+ .data = &dataimage_scf0700c48ggu18,
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}, {
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.compatible = "dlc,dlc0700yzg-1",
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.data = &dlc_dlc0700yzg_1,
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