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@@ -340,6 +340,8 @@ static void setup_i2c_controller(struct nmk_i2c_dev *dev)
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{
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u32 brcr1, brcr2;
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u32 i2c_clk, div;
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+ u32 ns;
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+ u16 slsu;
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writel(0x0, dev->virtbase + I2C_CR);
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writel(0x0, dev->virtbase + I2C_HSMCR);
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@@ -347,18 +349,38 @@ static void setup_i2c_controller(struct nmk_i2c_dev *dev)
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writel(0x0, dev->virtbase + I2C_RFTR);
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writel(0x0, dev->virtbase + I2C_DMAR);
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+ i2c_clk = clk_get_rate(dev->clk);
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+
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/*
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* set the slsu:
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*
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* slsu defines the data setup time after SCL clock
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- * stretching in terms of i2c clk cycles. The
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- * needed setup time for the three modes are 250ns,
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- * 100ns, 10ns respectively thus leading to the values
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- * of 14, 6, 2 for a 48 MHz i2c clk.
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+ * stretching in terms of i2c clk cycles + 1 (zero means
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+ * "wait one cycle"), the needed setup time for the three
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+ * modes are 250ns, 100ns, 10ns respectively.
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+ *
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+ * As the time for one cycle T in nanoseconds is
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+ * T = (1/f) * 1000000000 =>
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+ * slsu = cycles / (1000000000 / f) + 1
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*/
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- writel(dev->cfg.slsu << 16, dev->virtbase + I2C_SCR);
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+ ns = DIV_ROUND_UP_ULL(1000000000ULL, i2c_clk);
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+ switch (dev->cfg.sm) {
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+ case I2C_FREQ_MODE_FAST:
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+ case I2C_FREQ_MODE_FAST_PLUS:
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+ slsu = DIV_ROUND_UP(100, ns); /* Fast */
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+ break;
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+ case I2C_FREQ_MODE_HIGH_SPEED:
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+ slsu = DIV_ROUND_UP(10, ns); /* High */
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+ break;
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+ case I2C_FREQ_MODE_STANDARD:
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+ default:
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+ slsu = DIV_ROUND_UP(250, ns); /* Standard */
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+ break;
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+ }
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+ slsu += 1;
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- i2c_clk = clk_get_rate(dev->clk);
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+ dev_dbg(&dev->adev->dev, "calculated SLSU = %04x\n", slsu);
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+ writel(slsu << 16, dev->virtbase + I2C_SCR);
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/*
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* The spec says, in case of std. mode the divider is
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@@ -915,11 +937,6 @@ static const struct i2c_algorithm nmk_i2c_algo = {
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};
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static struct nmk_i2c_controller u8500_i2c = {
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- /*
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- * Slave data setup time; 250ns, 100ns, and 10ns, which
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- * is 14, 6 and 2 respectively for a 48Mhz i2c clock.
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- */
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- .slsu = 0xe,
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.tft = 1, /* Tx FIFO threshold */
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.rft = 8, /* Rx FIFO threshold */
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.clk_freq = 400000, /* fast mode operation */
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@@ -1027,7 +1044,6 @@ static int nmk_i2c_probe(struct amba_device *adev, const struct amba_id *id)
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/* fetch the controller configuration from machine */
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dev->cfg.clk_freq = pdata->clk_freq;
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- dev->cfg.slsu = pdata->slsu;
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dev->cfg.tft = pdata->tft;
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dev->cfg.rft = pdata->rft;
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dev->cfg.sm = pdata->sm;
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