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@@ -131,12 +131,15 @@
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#define SCLK_DPHY_RX0_CFG 165
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#define SCLK_RMII_SRC 166
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#define SCLK_PCIEPHY_REF100M 167
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+#define SCLK_DDRC 168
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#define DCLK_VOP0 180
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#define DCLK_VOP1 181
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#define DCLK_VOP0_DIV 182
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#define DCLK_VOP1_DIV 183
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#define DCLK_M0_PERILP 184
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+#define DCLK_VOP0_FRAC 185
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+#define DCLK_VOP1_FRAC 186
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#define FCLK_CM0S 190
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Heiko Stuebner