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@@ -254,10 +254,13 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp)
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uint32_t max_sleep_time = 0x1f;
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/* Lately it was identified that depending on panel idle frame count
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* calculated at HW can be off by 1. So let's use what came
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- * from VBT + 1 and at minimum 2 to be on the safe side.
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+ * from VBT + 1.
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+ * There are also other cases where panel demands at least 4
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+ * but VBT is not being set. To cover these 2 cases lets use
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+ * at least 5 when VBT isn't set to be on the safest side.
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*/
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uint32_t idle_frames = dev_priv->vbt.psr.idle_frames ?
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- dev_priv->vbt.psr.idle_frames + 1 : 2;
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+ dev_priv->vbt.psr.idle_frames + 1 : 5;
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uint32_t val = 0x0;
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const uint32_t link_entry_time = EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
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